Semiconductor device and electronic device

• US 9,865,588 B2
• Filed: 05/28/2015
• Issued: 01/09/2018
• Est. Priority Date: 05/30/2014
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Isobe, Atsuo
• Primary Examiner(s): Bauer, Scott
• Application Number:
  US14/724,398
• Publication Number:
  US 20150348961A1
• Time in Patent Office: 957 Days
• CPC Class Codes: H01L 23/60 Protection against electrostatic charges or discharges, e.g. Faraday shields
• CPC Class Codes: H01L 27/0266 using field effect transistors as protective elements
• CPC Class Codes: H01L 27/0288 using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
• CPC Class Codes: H01L 27/1207 combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device that is hardly broken is provided. Alternatively, a semiconductor device having high reliability is provided. The semiconductor device includes a first circuit, a second circuit, a first wiring, a second wiring, and a third wiring. The second circuit has a function of protecting the first circuit. The second circuit includes a first transistor including an oxide semiconductor film. The first wiring is electrically connected to the first circuit through the second circuit. The first wiring is electrically connected to the first circuit through the second circuit. The first wiring has a function of inputting a signal. The second wiring is electrically connected to the first circuit. The second wiring is electrically connected to one of a source electrode and a drain electrode of the first transistor. The third wiring is electrically connected to a gate electrode of the first transistor included in the second circuit.

Claims

1. A semiconductor device comprising:

a first circuit;

a second circuit;

a first wiring;

a second wiring;

a third wiring; and

a fourth wiring;

wherein the first circuit includes a plurality of transistors,

wherein the second circuit has a function of protecting the first circuit,

wherein the second circuit comprises;

a first transistor,

a first diode,

a second diode, and

a fourth transistor,

wherein the first wiring is electrically connected to the first circuit via the second circuit,

wherein the first wiring is has a function of inputting a signal,

wherein the second wiring is electrically connected to the first circuit,

wherein the second wiring is electrically connected to one of a source electrode and a drain electrode of the first transistor,

wherein the third wiring is electrically connected to a gate electrode of the first transistor,

wherein the fourth wiring is electrically connected to the other of the source electrode and the drain electrode of the first transistor,

wherein the first transistor includes an oxide semiconductor film, and

wherein the fourth transistor has a lower off current than the first transistor.

2. A semiconductor device according to claim 1,

wherein the first wiring is electrically connected to the first circuit via the fourth transistor,

wherein the first wiring is electrically connected to the second wiring via the first diode, and

wherein the first wiring is connected to the fourth wiring via the second diode.

3. A semiconductor device according to claim 1,

wherein the semiconductor device is configured so that the fourth transistor is turned on when the first circuit is operated and off when the first circuit is not operated.

4. A semiconductor device according to claim 1,

wherein the semiconductor device is configured so that the fourth transistor is turned on when the first circuit is operated and off when the first circuit is not operated, and

wherein the semiconductor device is configured so that the first transistor is turned off when the first circuit is operated and on when the first circuit is not operated.

5. A semiconductor device according to claim 1,

wherein the semiconductor device is configured so that the fourth transistor is turned on when the first circuit is operated and off when the first circuit is not operated, and

wherein the fourth transistor has higher resistance than the first transistor when no signal is input to the gate electrode of the first transistor and to a gate electrode of the fourth transistor.

6. A semiconductor device according to claim 1,

wherein the semiconductor device is configured so that the fourth transistor is turned on when the first circuit is operated and off when the first circuit is not operated, and

wherein a channel width of the fourth transistor is smaller than a channel width of the first transistor.

7. A semiconductor device comprising:

a first circuit;

a second circuit;

a first wiring;

a second wiring;

a third wiring; and

a fourth wiring,

wherein the first circuit includes a plurality of transistors,

wherein the second circuit has a function of protecting the first circuit,

wherein the second circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor,

wherein the first wiring is electrically connected to the first circuit through the second circuit,

wherein the first wiring has a function of inputting a signal,

wherein the second wiring is electrically connected to the first circuit,

wherein the third wiring is electrically connected to a gate electrode of the first transistor included in the second circuit,

wherein one of a source electrode and a drain electrode of the first transistor is electrically connected to the second wiring,

wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to the fourth wiring,

wherein one of a source electrode and a drain electrode of the second transistor is electrically connected to the second wiring,

wherein the other of the source electrode and the drain electrode of the second transistor is electrically connected to the first wiring,

wherein one of a source electrode and a drain electrode of the third transistor is electrically connected to the first wiring,

wherein the other of the source electrode and the drain electrode of the third transistor is electrically connected to the fourth wiring,

wherein one of a source electrode and a drain electrode of the fourth transistor is electrically connected to the first wiring,

wherein the other of the source electrode and the drain electrode of the fourth transistor is electrically connected to the first circuit,

wherein the first to the fourth transistors each include an oxide semiconductor film, and

wherein the fourth transistor has a lower off current than the first to the third transistors.

8. A semiconductor device according to claim 7,

wherein the fourth transistor has higher resistance than the first to the third transistors when a signal is not input to a gate electrode of each of the first to fourth transistors.

9. A semiconductor device according to claim 7,

wherein the first wiring is a signal line for inputting a signal into the first circuit,

wherein the second wiring is a high potential power supply line,

wherein the fourth wiring is a low-potential power supply line or a ground potential line.

10. A semiconductor device according to claim 7,

wherein the first to the third transistors each comprise:

a plurality of island-shaped oxide semiconductor regions;

a first gate insulating film; and

a first gate electrode;

wherein, for each of the first to the third transistors, side surfaces and top surfaces of the plurality of island-shaped oxide semiconductor layers are covered with the first gate insulating film,

wherein, for each of the first to the third transistors, the first gate electrode faces each of the side surfaces and the top surfaces of the plurality of island-shaped oxide semiconductor layers.

11. A semiconductor device according to claim 10,

wherein the island-shaped semiconductor layers included in the first to the third transistors comprise:

a first oxide layer;

a second oxide layer in contact with at least part of a top surface of the first oxide layer; and

a third oxide layer in contact with at least part of a top surface of the second oxide layer,

wherein electron affinity of the second oxide layer is larger than electron affinities of the first oxide layer and the third oxide layer.

12. An electronic device comprising the semiconductor device according to claim 7, and further comprising a housing, a microphone, a speaker, an operation key, or a lens.

13. A semiconductor device according to claim 7,

wherein the fourth wiring is electrically connected to the first circuit.

14. A semiconductor device according to claim 7,

wherein a gate electrode of the second transistor and a gate electrode of the third transistor are electrically connected to the gate electrode of the first transistor.

15. A semiconductor device according to claim 7,

wherein the semiconductor device is configured so that the first transistor is turned off when the first circuit is operated.

16. A semiconductor device according to claim 7,

wherein the semiconductor device is configured so that the first transistor is turned off when the first circuit is operated, and

wherein the semiconductor device is configured so that the fourth transistor is turned on when the first circuit is operated.