PFC shutdown circuit for light load

• US 9,866,108 B2
• Filed: 10/06/2015
• Issued: 01/09/2018
• Est. Priority Date: 10/08/2014
• Status: Active Grant

• Current Assignee: Power Integrations Incorporated
• Original Assignee: Power Integrations Incorporated
• Inventors: Mayell, Robert J., Singamaneni, Bala Sudhakar
• Primary Examiner(s): AHMED, YUSEF A
• Application Number:
  US14/876,734
• Publication Number:
  US 20160105095A1
• Time in Patent Office: 826 Days
• CPC Class Codes: H02M 1/0032 Control circuits allowing low power mode operation, e.g. in standby mode
• CPC Class Codes: H02M 1/007 Plural converter units in cascade push-pull DC/DC converters with pre-regulator H02M3/3374; DC-AC converters following a DC-DC stage including a high frequency transformer H02M7/4807; DC-AC converters following a DC-DC conversion stage generating periodically varying voltages H02M7/4826
• CPC Class Codes: H02M 1/42 Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
• CPC Class Codes: H02M 1/4225 using a non-isolated boost converter
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A power converter includes a front end stage having a power factor correction controller, an output stage with a DC/DC controller, and light load detection circuitry coupled to detect relatively low power consumption by a load on an output of the output stage. In response to the detection, the power factor correction controller in the front end stage is turned off.

Claims

1. A power converter comprising:

a front end stage comprising a power factor correction controller;

an output stage comprising a DC/DC controller;

light load detection circuitry coupled to detect relatively low power consumption by a load on an output of the output stage and, in response to the detection, turn off the power factor correction controller in the front end stage; and

a bias supply circuit coupled between the front end stage and the light load detection circuitry, wherein the bias supply circuit comprises;

a first transistor having a base coupled to the light load detection circuitry;

a resistor directly coupled between the first transistor and a first voltage node;

a zener diode directly coupled between the first transistor and an input return; and

a second transistor directly coupled between the first voltage node and the front end stage, wherein the second transistor includes a base coupled to a second voltage node between the first transistor and the zener diode.

2. The power converter of claim 1, wherein the relatively low power consumption is a power consumption of 5% or less than a maximum power load of the power converter.

3. The power converter of claim 2, wherein the relatively low power consumption is a power consumption of 2.5% or less than a maximum power load of the power converter.

4. The power converter of claim 3, wherein the relatively low power consumption is a power consumption of 1% or less than a maximum power load of the power converter.

5. The power converter of claim 1, wherein the front end stage comprises an active power factor correction boost stage.

6. The power converter of claim 1, wherein the output stage further comprises a flyback converter.

7. The power converter of claim 1, wherein the output stage further comprises a power switch, wherein the DC/DC controller is configured to reduce switching frequency of the power switch in response to a light load condition.

8. The power converter of claim 7, wherein the light load detection circuitry comprises frequency sense circuitry to sense the reduction of the switching frequency by the DC/DC controller.

9. The power converter of claim 1, wherein the light load detection circuitry is to output a light load detection signal coupled to be received by the base of the first transistor in response to the detection of the relatively low power consumption by the load.

10. The power converter of claim 9, wherein the second transistor is coupled to a supply input of the power factor correction controller, the second transistor responsive to the light load detection signal to disconnect a supply of power from the supply input of the power factor correction controller.

11. The power converter of claim 1, wherein:

the power converter further comprises a rectifier coupled to rectify an input AC signal and output a first DC signal to the front end stage;

the front end stage is operative to convert the first DC signal into a second DC signal having a larger peak magnitude than the first DC signal; and

the output stage is configured to convert the second DC signal into a regulated output.

12. The power converter of claim 11, wherein:

the input AC signal is a commercial line voltage between 90 and 260 Vac; and

the regulated output is between 3 and 20 volts.

13. The power converter of claim 1, wherein:

the output stage further comprises an energy transfer element having a primary winding, a secondary winding, and a tertiary winding; and

the light load detection circuitry is coupled to the tertiary winding to detect the relatively low power consumption by the load.

14. The power converter of claim 1, wherein the power converter is a dual stage power converter.

15. A power converter comprising:

a boost power factor correction stage comprising a power factor correction controller;

a DC/DC stage comprising a DC/DC controller;

light load detection circuitry coupled to detect relatively low power consumption by a load on an output of the DC/DC stage and, in response to the detection, turn off the power factor correction controller in the boost power factor correction stage; and

a bias supply circuit coupled between the boost factor correction stage and the light load detection circuitry, wherein the bias supply circuit comprises;

a first transistor having a base coupled to the light load detection circuitry;

a resistor directly coupled between the first transistor and a first voltage node;

a zener diode directly coupled between the first transistor and an input return; and

a second transistor directly coupled between the first voltage node and the boost factor correction stage, wherein the second transistor includes a base coupled to a second voltage node between the first transistor and the zener diode.

16. The power converter of claim 15, wherein the relatively low power consumption is a power consumption of 5% or less than a maximum power load of the power converter.

17. The power converter of claim 15, wherein the boost power factor correction stage comprises an active power factor correction boost stage.

18. The power converter of claim 15, wherein the DC/DC stage further comprises a flyback converter.

19. The power converter of claim 15, wherein the DC/DC stage further comprises a power switch, wherein the DC/DC controller is configured to reduce switching frequency of the power switch in response to a light load condition.

20. The power converter of claim 19, wherein the light load detection circuitry comprises frequency sense circuitry to sense the reduction of the switching frequency by the DC/DC controller.

21. The power converter of claim 15, wherein the light load detection circuitry is to output a light load detection signal coupled to be received by the base of the first transistor in response to the detection of the relatively low power consumption by the load.

22. The power converter of claim 21, wherein the second transistor is coupled to a supply input of the power factor correction controller, the second transistor responsive to the light load detection signal to disconnect a supply of power from the supply input of the power factor correction controller.

23. The power converter of claim 15, wherein:

the power converter further comprises a rectifier coupled to rectify an input AC signal and output a first DC signal to the boost power factor correction stage;

the boost power factor correction stage is operative to convert the first DC signal into a second DC signal having a larger peak magnitude than the first DC signal; and

the DC/DC stage is configured to convert the second DC signal into a regulated output.

24. The power converter of claim 23, wherein:

the input AC signal is a commercial line voltage between 90 and 260 Vac;

and the regulated output is between 3 and 20 volts.

25. The power converter of claim 15, wherein:

the DC/DC stage further comprises an energy transfer element having a primary winding, a secondary winding, and a tertiary winding; and

the light load detection circuitry is coupled to the tertiary winding to detect the relatively low power consumption by the load.

26. The power converter of claim 15, wherein the power converter is a dual stage power converter.

27. A power converter comprising:

a rectifier coupled to rectify an input AC signal and output a first DC signal having a first peak amplitude;

a power factor correction front end stage configured to,

in a first state, receive the first DC signal output from the rectifier and output a second DC signal having a larger peak amplitude than the first peak amplitude, and

in a second state, receive the first DC signal and output a third DC signal having a smaller peak amplitude than the first peak amplitude;

an output stage coupled to receive either the second DC signal or the third DC signal from the power factor correction front end stage and output a regulated DC signal to power a load;

load detection circuitry coupled to output a low load signal in response to detection of relatively low power consumption by the load, the power factor correction front end stage configured to switch into the second state in response to the low load signal; and

a bias supply circuit coupled between the power factor correction front end stage and the load detection circuitry, wherein the bias supply circuit comprises;

a first transistor having a base coupled to receive the low load signal from the load detection circuitry;

a resistor directly coupled between the first transistor and a first voltage node;

a zener diode directly coupled between the first transistor and an input return; and

a second transistor directly coupled between the first voltage node and the power factor correction front end stage, wherein the second transistor includes a base coupled to a second voltage node between the first transistor and the zener diode.

28. The power converter of claim 27, wherein the relatively low power consumption is a power consumption of 5% or less than a maximum power load of the power converter.

29. The power converter of claim 28, wherein the relatively low power consumption is a power consumption of 2.5% or less than a maximum power load of the power converter.

30. The power converter of claim 29, wherein the relatively low power consumption is a power consumption of 1% or less than a maximum power load of the power converter.

31. The power converter of claim 27, wherein:

the power factor correction front end stage comprises a power factor correction controller; and

the power factor correction controller is off in the second state of the power factor correction front end stage.

32. The power converter of claim 27, wherein the power factor correction front end stage comprises an active power factor correction boost stage.

33. The power converter of claim 27, wherein the output stage comprises a flyback converter.

34. The power converter of claim 27, wherein the output stage comprises a power switch, wherein a switching frequency of the power switch is reduced in response to a light load condition.

35. The power converter of claim 34, wherein the load detection circuitry comprises frequency sense circuitry to sense the reduction of the switching frequency of the power switch.

36. The power converter of claim 27, wherein:

the input AC signal is a commercial line voltage between 90 and 260 Vac; and

the regulated DC signal output to the load is between 3 and 20 volts.

37. The power converter of claim 27, wherein the power factor correction front end stage comprises:

a power factor correction controller.

38. The power converter of claim 27, wherein the power converter is a dual stage power converter.