Array substrate and liquid crystal display panel including the same

• US 9,869,915 B2
• Filed: 10/07/2015
• Issued: 01/16/2018
• Est. Priority Date: 10/09/2014
• Status: Active Grant

• Current Assignee: Trivale Technologies, LLC (Vector Capital Corporation)
• Original Assignee: Mitsubishi Electric Corporation
• Inventors: Hashiguchi, Takafumi
• Primary Examiner(s): Caley, Michael
• Assistant Examiner(s): Jung, Jonathan Y
• Application Number:
  US14/877,618
• Publication Number:
  US 20160103378A1
• Time in Patent Office: 832 Days
• CPC Class Codes: G02F 1/1345 Conductors connecting electrodes to cell terminals
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/136254 Checking; Testing
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1244 for preventing breakage, peeling or short circuiting

Abstract

An array substrate according to the present invention is an array substrate including a display region that displays an image and a frame region. The array substrate includes: a plurality of scanning lines; a plurality of signal lines; a thin film transistor disposed at an intersection of each of the plurality of scanning lines and each of the plurality of signal lines; a plurality of in-frame wires formed in the frame region; and a plurality of connection converters that electrically connect the scanning lines or the signal lines to the in-frame wires and are provided in the frame region. A single contact hole that penetrates an insulating layer is formed in each of the connection converters, and each of the scanning lines or each of the signal lines is electrically connected with each of the in-frame wires through a conductive film in the single contact hole.

Claims

1. An array substrate including a display region that displays an image and a frame region that surrounds said display region, said array substrate comprising:

a plurality of scanning lines that are formed in parallel in said display region and are extended to said frame region;

a plurality of signal lines that are formed to intersect said plurality of scanning lines, are formed to be in parallel in said display region, and are extended to said frame region;

a thin film transistor disposed at an intersection of each of said plurality of scanning lines and each of said plurality of signal lines;

a first driving IC chip in said frame region and connected to the plurality of scanning lines;

a second driving IC chip in said frame region and connected to the plurality of signal lines;

a plurality of in-frame wires formed in said frame region;

an insulating layer that vertically separates said scanning lines and said signal lines from said in-frame wires in said frame region; and

a plurality of connection converters that electrically connect said scanning lines or said signal lines to said in-frame wires and are provided in said frame region, wherein

a single contact hole that penetrates said insulating layer is formed in each of said connection converters, and each of said scanning lines or each of said signal lines is electrically connected with each of said in-frame wires through a conductive film in said single contact hole,

said single contact hole has dimensions such that a terminal of an inspection device inspecting lines for breaks is allowed to be inserted in said single contact hole and said terminal is allowed to be in contact with said conductive film in said single contact hole,

said connection converters do not overlap with said first and second driving IC chips in a plan view, and

each of said scanning lines or each of said signal lines extends towards one of said connection converters in a same direction as said electrically connected in-frame wire extends away from said one connection converter.

2. The array substrate according to claim 1, wherein

said single contact hole has:

a first horizontal region in which a first bottom of said single contact hole is in contact with each of said scanning lines or each of said signal lines; and

a second horizontal region in which a second bottom of said single contact hole is in contact with each of said in-frame wires,

wherein a sum of an area of said first horizontal region and an area of said second horizontal region is 3000 μ

m² or more.

3. The array substrate according to claim 1, wherein

said single contact hole has:

a first horizontal region in which a first bottom of said single contact hole is in contact with each of said scanning lines or each of said signal lines; and

a second horizontal region in which a second bottom of said single contact hole is in contact with each of said in-frame wires,

wherein an area of said first horizontal region is different from an area of said second horizontal region.

4. The array substrate according to claim 3, wherein the area of said first horizontal region is larger than the area of said second horizontal region.

5. The array substrate according to claim 1, wherein

said frame region includes an inspection thin-film transistor, and

each of said in-frame wires is a wire connected with an electrode of said inspection thin-film transistor, an electrode of said first driving IC chip, or an electrode of said second driving IC chip.

6. The array substrate according to claim 1, wherein a wire formed in an upper layer among each of said scanning lines or each of said signal lines and each of said in-frame wires is formed of a semiconductor layer and a conductive film laminated in the stated order.

7. The array substrate according to claim 1, wherein a wire formed in an upper layer among each of said scanning lines or each of said signal lines and said in-frame wires is coated with a transparent conductive film.

8. The array substrate according to claim 1, wherein said conductive film formed in said signal contact hole is formed of a lower transparent conductive film, a conductive film, and an upper transparent conductive film laminated in the stated order.

9. A liquid crystal display panel, comprising:

the array substrate according to claim 1;

a color filter substrate opposed to said array substrate; and

liquid crystals held between said array substrate and said color filter substrate.

10. The array substrate according to claim 1, wherein

said plurality of connection converters include a first connection converter and a second connection converter,

said first connection converter electrically connects one of said scanning lines to a first in-frame wire of said in-frame wires,

said second connection converter electrically connects one of said signal lines to a second in-frame wire of said in-frame wires,

a first single contact hole that penetrates said insulating layer is formed in said first connection converter, and said one of said scanning lines is electrically connected with said first in-frame wire through a first conductive film in said first single contact hole, and

a second single contact hole that penetrates said insulating layer is formed in said second connection converter, and said one of said signal lines is electrically connected with said second in-frame wire through a second conductive film in said second single contact hole.