Memory system and method of controlling nonvolatile memory

• US 9,870,836 B2
• Filed: 09/03/2015
• Issued: 01/16/2018
• Est. Priority Date: 03/10/2015
• Status: Active Grant

• Current Assignee: Kioxia Corporation
• Original Assignee: Toshiba Memory Corporation (Kioxia Corporation)
• Inventors: Ooneda, Taku
• Primary Examiner(s): Rones, Charles
• Assistant Examiner(s): Chang, Tian-Pong
• Application Number:
  US14/844,263
• Publication Number:
  US 20160266826A1
• Time in Patent Office: 866 Days
• CPC Class Codes: G06F 12/02 Addressing or allocation; Relocation program address sequencing G06F9/00; arrangements for selecting an address in a digital store G11C8/00
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 2029/5004 Voltage
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents
• CPC Class Codes: G11C 29/789 using non-volatile cells or latches

Abstract

According to one embodiment, when a command for committing data requested to be written is received from a host, a controller calculates a first value in a case where data has not been written up to a final page of a second block that is a multi-value recording block. The first value represents an amount or a data ratio of data written into the second block. The controller writes write data, which is written into a first block that is a binary-value recording block, up to a final page of the second block in a case where the first value is a first threshold or more.

Claims

1. A memory system comprising:

a nonvolatile memory including at least one first block and a plurality of second blocks, and

a controller configured to

write first data received from a host into the first block in a single level cell mode,

write second data received from the host into a third block in a multiple level cell mode, the third block being a block among the second blocks,

calculate a first value in response to a first command being a command for committing the first data and the second data, the first value representing an amount of the second data that has been written in the third block or a ratio between the second data that has been written in the third block and an entire capacity of the third block, and

move, into the third block until the third block becomes full, the first data that has been written in the first block in case where the first value is more than a first threshold.

2. The memory system according to claim 1, wherein, in case where the first value is less than the first threshold, the controller writes, into the third block until the third block becomes full, dummy data or valid data stored in a fourth block, the fourth block being a Garbage Collection source block among the first block and the second blocks.

3. The memory system according to claim 2, wherein

the fourth block includes the valid data and invalid data, and

the controller is configured to:

write the valid data into the third block in case where the fourth block is present; and

write the dummy data into the third block in case where the fourth block is not present.

4. The memory system according to claim 1, wherein

the controller is configured to write the first data into the first block in case where the first block is not full, and write the second data into the third block in case where the first block is full.

5. The memory system according to claim 3, wherein the controller is configured to use a free block among the plurality of second blocks as the first block in case where the first block becomes a bad block.

6. The memory system according to claim 5, wherein the controller changes the first threshold based on a number of the plurality of second blocks and a number of times of erasing data of the plurality of second blocks.

7. The memory system according to claim 6, wherein the controller decreases the first threshold in case where the number of the plurality of second blocks is more than a second threshold, and the number of times of erasing data is more than a third threshold.

8. The memory system according to claim 7, wherein the controller increases the first threshold in case where the number of the plurality of second blocks is less than the second threshold, and the number of times of erasing data is less than the third threshold.

9. The memory system according to claim 3, wherein

the fourth block is a block among the plurality of second blocks.

10. The memory system according to claim 1, further comprising a volatile memory, wherein the first command is a flush cache command that is based on SATA standard, the flush cache command being a request for nonvolatilization of data stored in the volatile memory.

11. A method of controlling a nonvolatile memory including a at least one first block and a plurality of second blocks, the method comprising:

writing first data received from a host into the first block in a single level cell mode;

writing second data received from the host into a third block in a multiple level cell mode, the third block being a block among the second blocks;

calculating a first value in response to a first command received from the host in case where the third block is not full, the first command being a command for committing the first data and the second data, the first value representing an amount of the second data that has been written in the third block or a ratio between the second data that has been written in the third block and an entire capacity of the third block; and

moving, into the third block until the third block becomes full, the first data that has been written in the first block in case where the first value is more than a first threshold.

12. The method according to claim 11, further comprising

moving, into the third block until the third block becomes full, dummy data or valid data stored in a fourth block, the fourth block being a Garbage Collection source black among the first block and the second blocks in case where the first value is less than the first threshold.

13. The method according to claim 12,

wherein the fourth block includes the valid data and invalid data,

the method further comprising:

writing the valid data into the third block in case where the fourth block is present; and

writing the dummy data into the third block in case where the fourth block is not present.

14. The method according to claim 11, further comprising:

writing the first data into the first block in case where the first block is not full; and

writing the second data into the third block in case where the first block is full.

15. The method according to claim 13, further comprising

using a free block among the plurality of second blocks as the first block in case where the first block becomes a bad block.

16. The method according to claim 15, further comprising

changing the first threshold based on a number of the plurality of second blocks and a number of times of erasing data of the plurality of second blocks.

17. The method according to claim 16, further comprising

decreasing the first threshold in case where the number of the plurality of second blocks is more than a second threshold, and the number of times of erasing data is more than a third threshold.

18. The method according to claim 17, further comprising

increasing the first threshold in case where the number of the plurality of second blocks is less than the second threshold, and the number of times of erasing data is less than the third threshold.

19. The method according to claim 13, wherein

the fourth block is a block among the plurality of second blocks.

20. The method according to claim 11, wherein the first command is a flush cache command that is based on SATA standard, the flush cache command being a request for nonvolatilization of data stored in a volatile memory.