Semiconductor integrated circuit device

• US 9,871,033 B2
• Filed: 04/10/2017
• Issued: 01/16/2018
• Est. Priority Date: 09/16/2011
• Status: Active Grant

• Current Assignee: Socionext Inc.
• Original Assignee: Socionext Inc.
• Inventors: Usami, Shiro
• Primary Examiner(s): TOBERGTE, NICHOLAS J
• Application Number:
  US15/483,372
• Publication Number:
  US 20170213819A1
• Time in Patent Office: 281 Days
• CPC Class Codes: H01L 23/528 Geometry or layout of the interconnection structure H01L27/0207 takes precedence; algorithms G06F30/00
• CPC Class Codes: H01L 23/5286 Arrangements of power or ground buses
• CPC Class Codes: H01L 27/0248 for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
• CPC Class Codes: H01L 27/0251 for MOS devices
• CPC Class Codes: H01L 27/0255 using diodes as protective elements
• CPC Class Codes: H01L 27/0259 using bipolar transistors as protective elements
• CPC Class Codes: H01L 27/0262 including a PNP transistor and a NPN transistor, wherein each of said transistors has its base coupled to the collector of the other transistor, e.g. silicon controlled rectifier [SCR] devices
• CPC Class Codes: H01L 27/0266 using field effect transistors as protective elements
• CPC Class Codes: H01L 27/0288 using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
• CPC Class Codes: H01L 27/0292 using a specific configuration of the conducting means connecting the protective devices, e.g. ESD buses
• CPC Class Codes: H01L 29/861 Diodes
• CPC Class Codes: H01L 29/87 Thyristor diodes, e.g. Shockley diodes, break-over diodes

Abstract

Diffusion regions having the same conductivity type are arranged on a side of a second wiring and a side of a third wiring, respectively under a first wiring connected to a signal terminal. Diffusion regions are separated in a whole part or one part of a range in a Y direction. That is, under first wiring, diffusion regions are only formed in parts opposed to diffusion regions formed under the second wiring and third wiring connected to a power supply terminal or a ground terminal, and a diffusion region is not formed in a central part in an X direction. Therefore, terminal capacity of the signal terminal can be reduced without causing ESD resistance to be reduced, in an ESD protection circuit with the signal terminal.

Claims

1. A semiconductor integrated circuit device having an ESD (Electro Static Discharge) protection circuit, wherein:

the ESD protection circuit comprises;

a first wiring extending in a first direction and electrically connected to a first terminal;

a second wiring and a third wiring extending in the first direction, electrically connected to a power supply terminal or a ground terminal, and disposed on both sides of the first wiring respectively;

a first diffusion region and a second diffusion region having a first conductivity type, that are connected to and formed under the first wiring disposed between the second wiring and the third wiring in a second direction perpendicular to the first direction, the first and second diffusion regions being separated from each other;

a third diffusion region and a fourth diffusion region having a second conductivity type, that are connected to and formed under the second wiring, and the fourth diffusion region being disposed so as to be opposed to the first diffusion region in the second direction, the third and fourth diffusion regions being separated from each other; and

a fifth diffusion region and a sixth diffusion region having the second conductivity type, that are connected to and formed under the third wiring, and the fifth diffusion region being disposed so as to be opposed to the second diffusion region in the second direction, the fifth and sixth diffusion regions being separated from each other,

the third diffusion region is disposed further away from the first diffusion region than the fourth diffusion region, and the sixth diffusion region is disposed further away from the second diffusion region than the fifth diffusion region, and

the first conductivity type is different from the second conductivity type.

2. The semiconductor integrated circuit device according to claim 1, wherein

each of the first, second, third, fourth, fifth and sixth diffusion regions has a rectangular shape.

3. The semiconductor integrated circuit device according to claim 1, wherein

the second wiring and the third wiring are electrically connected to the power supply terminal.

4. The semiconductor integrated circuit device according to claim 3, wherein:

the first conductivity type is a P type, and the second conductivity type is an N type, and

the ESD protection circuit is a diode type having the first terminal as an anode and the power supply terminal as a cathode.

5. The semiconductor integrated circuit device according to claim 1, wherein

the second wiring and the third wiring are connected to the ground terminal.

6. The semiconductor integrated circuit device according to claim 5, wherein:

the first conductivity type is an N type, and the second conductivity type is a P type, and

the ESD protection circuit is a diode type having the ground terminal as an anode and the first terminal as a cathode.

7. The semiconductor integrated circuit device according to claim 1, wherein:

the first and second diffusion regions are connected to the first wiring via at least one first contact,

the third and fourth diffusion regions are connected to the second wiring via at least one second contact, and

the fifth and sixth diffusion regions are connected to the third wiring via at least one third contact.

8. The semiconductor integrated circuit device according to claim 1, wherein

a space between the first wiring and the second wiring in the second direction is smaller than a space between the first diffusion region and the fourth diffusion region in the second direction, and

a space between the first wiring and the third wiring in the second direction is smaller than a space between the second diffusion region and the fifth diffusion region in the second direction.

9. The semiconductor integrated circuit device according to claim 1, wherein

a space between the first wiring and the second wiring in the second direction is larger than a space between the first diffusion region and the fourth diffusion region in the second direction, and

a space between the first wiring and the third wiring in the second direction is larger than a space between the second diffusion region and the fifth diffusion region in the second direction.

10. The semiconductor integrated circuit device according to claim 1, wherein

the ESD protection circuit comprises:

a fourth wiring extending in the first direction and electrically connected to the first terminal;

a fifth wiring extending in the first direction, electrically connected to the power supply terminal or the ground terminal, and the third wiring and the fifth wiring disposed on both sides of the fourth wiring respectively;

a seventh diffusion region and an eighth diffusion region having the first conductivity type, that are connected to and formed under the fourth wiring, and the seventh diffusion region being disposed so as to be opposed to the sixth diffusion region in the second direction, the seventh and eighth diffusion regions being separated from each other; and

a ninth diffusion region and a tenth diffusion region having the second conductivity type, that are connected to and formed under the fifth wiring, and the ninth diffusion region being disposed so as to be opposed to the eighth diffusion region in the second direction, the ninth and tenth diffusion regions being separated from each other,

the eighth diffusion region is disposed further away from the sixth diffusion region than the seventh diffusion region, and the tenth diffusion region is disposed further away from the eighth diffusion region than the ninth diffusion region.

11. The semiconductor integrated circuit device according to claim 10, wherein

each of the first, second, third, fourth, fifth, sixth, seventh, eighth, ninth and tenth diffusion regions has a rectangular shape.

12. The semiconductor integrated circuit device according to claim 10, wherein

the second wiring, the third wiring and the fifth wiring are electrically connected to the power supply terminal.

13. The semiconductor integrated circuit device according to claim 12, wherein:

the first conductivity type is a P type, and the second conductivity type is an N type, and

the ESD protection circuit is a diode type having the first terminal as an anode and the power supply terminal as a cathode.

14. The semiconductor integrated circuit device according to claim 10, wherein

the second wiring, the third wiring and the fifth wiring are connected to the ground terminal.

15. The semiconductor integrated circuit device according to claim 14, wherein:

the first conductivity type is an N type, and the second conductivity type is a P type, and

the ESD protection circuit is a diode type having the ground terminal as an anode and the first terminal as a cathode.

16. The semiconductor integrated circuit device according to claim 10, wherein:

the first and second diffusion regions are connected to the first wiring via at least one first contact,

the third and fourth diffusion regions are connected to the second wiring via at least one second contact,

the fifth and sixth diffusion regions are connected to the third wiring via at least one third contact,

the seventh and eighth diffusion regions are connected to the fourth wiring via at least one fourth contact, and

the ninth and tenth diffusion regions are connected to the fifth wiring via at least one fifth contact.

17. The semiconductor integrated circuit device according to claim 10, wherein

a space between the first wiring and the second wiring in the second direction is smaller than a space between the first diffusion region and the fourth diffusion region in the second direction, and

a space between the first wiring and the third wiring in the second direction is smaller than a space between the second diffusion region and the fifth diffusion region in the second direction, and

a space between the third wiring and the fourth wiring in the second direction is smaller than a space between the sixth diffusion region and the seventh diffusion region in the second direction, and

a space between the fourth wiring and the fifth wiring in the second direction is smaller than a space between the eighth diffusion region and the ninth diffusion region in the second direction.

18. The semiconductor integrated circuit device according to claim 10, wherein

a space between the first wiring and the second wiring in the second direction is larger than a space between the first diffusion region and the fourth diffusion region in the second direction, and

a space between the first wiring and the third wiring in the second direction is larger than a space between the second diffusion region and the fifth diffusion region in the second direction, and

a space between the third wiring and the fourth wiring in the second direction is larger than a space between the sixth diffusion region and the seventh diffusion region in the second direction, and

a space between the fourth wiring and the fifth wiring in the second direction is larger than a space between the eighth diffusion region and the ninth diffusion region in the second direction.