Metal oxide film and method for forming metal oxide film

• US 9,871,058 B2
• Filed: 04/16/2015
• Issued: 01/16/2018
• Est. Priority Date: 11/08/2012
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Takahashi, Masahiro, Hirohashi, Takuya, Tsubuku, Masashi, Ishihara, Noritaka, Oota, Masashi
• Primary Examiner(s): Mondt, Johannes P
• Application Number:
  US14/688,232
• Publication Number:
  US 20150294994A1
• Time in Patent Office: 1,006 Days
• Field of Search: 257 43, 257 59, 257 72
• CPC Class Codes: C23C 14/086 of zinc, germanium, cadmium, indium, tin, thallium or bismuth
• CPC Class Codes: G01N 23/207 Diffractometry using detectors, e.g. using a probe in a central position and one or more displaceable detectors in circumferential positions
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10 nm, which allows the observation of circumferentially arranged spots in a nanobeam electron diffraction pattern of the cross section of the metal oxide film when the measurement area is greater than or equal to 5 nmφ and less than or equal to 10 nmφ.

Claims

1. An active matrix display device comprising a pixel, the pixel comprising a pixel electrode and a first transistor electrically connected to the pixel electrode, the first transistor comprising:

an oxide semiconductor film comprising a crystalline part, the oxide semiconductor film including a channel formation region; and

a gate electrode adjacent to the channel formation region with a gate insulating layer therebetween,

wherein the oxide semiconductor film includes a first metal, a second metal, and a third metal,

wherein the first metal is indium, the second metal is zinc, and the third metal is any one of Al, Ti, Ga, Y, Zr, La, Ce, Nd and Hf,

wherein a size of the crystalline part is less than or equal to 10 nm,

wherein a plurality of circumferentially distributed spots are observable in a measurement area greater than or equal to an area with a diameter of 5 nmφ and

less than or equal to an area with a diameter of 10 nmφ

in a nanobeam electron diffraction pattern of a cross-section of the oxide semiconductor film, and

wherein a halo pattern is observable in a selected-area electron diffraction pattern of a plane of the oxide semiconductor film,

wherein a crystalline peak is not observable in an XRD spectrum with respect to the oxide semiconductor film.

2. The active matrix display device according to claim 1, wherein the third metal is gallium.

3. The active matrix display device according to claim 1, wherein a size of the crystalline part is less than or equal to 5 nm.

4. The active matrix display device according to claim 1, wherein the gate electrode is located below the oxide semiconductor film.

5. The active matrix display device according to claim 1, wherein the gate electrode is located above the oxide semiconductor film.

6. The active matrix display device according to claim 1, wherein the pixel further comprises a second transistor, and wherein the gate electrode of the first transistor is connected to one of a source and a drain of the second transistor.

7. An active matrix display device comprising a pixel, the pixel comprising a pixel electrode and a first transistor electrically connected to the pixel electrode, the first transistor comprising:

an oxide semiconductor film comprising a crystalline part, the oxide semiconductor film including a channel formation region; and

a gate electrode adjacent to the channel formation region with a gate insulating layer therebetween,

wherein the oxide semiconductor film includes a first metal, a second metal, and a third metal,

wherein the first metal is indium, the second metal is zinc, and the third metal is any one of Al, Ti, Ga, Y, Zr, La, Ce, Nd and Hf,

wherein a size of the crystalline part is less than or equal to 10 nm,

wherein a plurality of circumferentially distributed spots are observable in a measurement area greater than or equal to an area with a diameter of 5 nmφ and

less than or equal to an area with a diameter of 10 nmφ

in a nanobeam electron diffraction pattern of a cross-section of the oxide semiconductor film, and

wherein a crystalline peak is not observable in an XRD spectrum with respect to the oxide semiconductor film.

8. The active matrix display device according to claim 7, wherein a halo pattern is observable in a selected-area electron diffraction pattern of a plane of the oxide semiconductor film.

9. The active matrix display device according to claim 7, wherein the third metal is gallium.

10. The active matrix display device according to claim 7, wherein a size of the crystalline part is less than or equal to 5 nm.

11. The active matrix display device according to claim 7, wherein the XRD spectrum is measured by an out-of-plane method.

12. The active matrix display device according to claim 7, wherein the gate electrode is located below the oxide semiconductor film.

13. The active matrix display device according to claim 7, wherein the gate electrode is located above the oxide semiconductor film.

14. The active matrix display device according to claim 7, wherein the pixel further comprises a second transistor, wherein the gate electrode of the first transistor is connected to one of a source and a drain of the second transistor.

15. An active matrix display device comprising a pixel, the pixel comprising a pixel electrode and a first transistor electrically connected to the pixel electrode, the first transistor comprising:

an oxide semiconductor film comprising a crystalline part, the oxide semiconductor film including a channel formation region; and

a gate electrode adjacent to the channel formation region with a gate insulating layer therebetween,

wherein the oxide semiconductor film includes a first metal, a second metal, and a third metal,

wherein the first metal is indium, the second metal is zinc, and the third metal is any one of Al, Ti, Ga, Y, Zr, La, Ce, Nd and Hf,

wherein a size of the crystalline part is less than or equal to 10 nm,

wherein a plurality of circumferentially distributed spots are observable in a measurement area greater than or equal to an area with a diameter of 5 nmφ and

less than or equal to an area with a diameter of 10 nmφ

in a nanobeam electron diffraction pattern of a cross-section of the oxide semiconductor film, and

wherein spots having order of regularity that represents a crystal state in which crystal parts are aligned with a specific plane are observable in the measurement area greater than or equal to an area with a diameter of 5 nmφ and

less than or equal to an area with a diameter of 10 nmφ

in the cross-sectional direction of the measurement area of a film thinned from the oxide semiconductor film to be less than or equal to 10 nm,

wherein a crystalline peak is not observable in an XRD spectrum with respect to the oxide semiconductor film.

16. The active matrix display device according to claim 15, wherein a halo pattern is observable in a selected-area electron diffraction pattern of a plane of the oxide semiconductor film.

17. The active matrix display device according to claim 15, wherein the third metal is gallium.

18. The active matrix display device according to claim 15, wherein a size of the crystalline part is less than or equal to 5 nm.

19. The active matrix display device according to claim 15, wherein the gate electrode is located below the oxide semiconductor film.

20. The active matrix display device according to claim 15, wherein the gate electrode is located above the oxide semiconductor film.

21. The active matrix display device according to claim 15, wherein the pixel further comprises a second transistor, wherein the gate electrode of the first transistor is connected to one of a source and a drain of the second transistor.

22. An active matrix display device comprising a pixel, the pixel comprising a pixel electrode and a first transistor electrically connected to the pixel electrode, the first transistor comprising:

a first oxide semiconductor film;

a second oxide semiconductor film on the first oxide semiconductor film;

a gate electrode adjacent to one of the first oxide semiconductor film and the second oxide semiconductor film with a gate insulating film interposed therebetween,

wherein at least one of the first oxide semiconductor film and the second oxide semiconductor film includes a first metal, a second metal, and a third metal,

wherein the at least one of the first oxide semiconductor film and the second oxide semiconductor film comprises a crystalline part,

wherein the first metal is indium, the second metal is zinc, and the third metal is any one of Al, Ti, Ga, Y, Zr, La, Ce, Nd and Hf,

wherein a size of the crystalline part is less than or equal to 10 nm, and

wherein a plurality of circumferentially distributed spots are observable in a measurement area greater than or equal to an area with a diameter of 5 nmφ and

less than or equal to an area with a diameter of 10 nmφ

in a nanobeam electron diffraction pattern of a cross-section of the at least one of the first oxide semiconductor film and the second oxide semiconductor film,

wherein a crystalline peak is not observable in an XRD spectrum with respect to the at least one of the oxide semiconductor film.

23. The active matrix display device according to claim 22, wherein a halo pattern is observable in a selected-area electron diffraction pattern of a plane of the at least one of the first oxide semiconductor film and the second oxide semiconductor film.

24. The active matrix display device according to claim 22, wherein the third metal is gallium.

25. The active matrix display device according to claim 22, wherein a size of the crystalline part is less than or equal to 5 nm.

26. The active matrix display device according to claim 22, wherein the gate electrode is located below the first oxide semiconductor film.

27. The active matrix display device according to claim 22, wherein the gate electrode is located above the second oxide semiconductor film.

28. The active matrix display device according to claim 22, wherein the pixel further comprises a second transistor, wherein the gate electrode of the first transistor is connected to one of a source and a drain of the second transistor.

29. The active matrix display device according to claim 22, wherein energy level of a conduction band minimum of the second oxide semiconductor film is closer to a vacuum level than energy level of a conduction band minimum of the first oxide semiconductor film.