Multi-band/multi-mode power amplifier with signal path hardware sharing
First Claim
1. A power amplifier (PA) comprising:
- a first signal path for signals in a first frequency band, the first signal path comprising a plurality of amplification stages;
a second signal path for signals in a second frequency band, the second signal path comprising a second plurality of amplification stages;
a bias circuit comprising an output coupled to one of the first plurality of amplification stages and a corresponding one of the second plurality of amplification stages and configured to provide a bias signal to the one of the first plurality of amplification stages and the corresponding one of the second plurality of amplification stages such that the bias circuit is shared between the first signal path and the second signal path; and
a bypass capacitor coupled between the output of the bias circuit and ground such that the bypass capacitor is shared between the first signal path and the second signal path.
2 Assignments
0 Petitions
Accused Products
Abstract
Existing multi-band/multi-mode (MB/MM) power amplifiers (PAs) use separate signal paths for the different covered frequency bands. This results in a large degree of hardware duplication and to a large die size and cost. Solutions that achieve hardware sharing between the different signal paths of MB/MM PAs are shown. Such sharing includes bias circuit and bypass capacitors sharing, as well as sharing front-end stages and the output stage of the PA. Signal multiplexing may be realized in the transmitter or at the PA front-end while the signal de-multiplexing can be realized either in the PA output stage or at the front-end of the output stage. Such circuits can be applied with saturated and linear MB/MM PAs with adjacent or non-adjacent bands.
30 Citations
5 Claims
-
1. A power amplifier (PA) comprising:
-
a first signal path for signals in a first frequency band, the first signal path comprising a plurality of amplification stages; a second signal path for signals in a second frequency band, the second signal path comprising a second plurality of amplification stages; a bias circuit comprising an output coupled to one of the first plurality of amplification stages and a corresponding one of the second plurality of amplification stages and configured to provide a bias signal to the one of the first plurality of amplification stages and the corresponding one of the second plurality of amplification stages such that the bias circuit is shared between the first signal path and the second signal path; and a bypass capacitor coupled between the output of the bias circuit and ground such that the bypass capacitor is shared between the first signal path and the second signal path. - View Dependent Claims (2, 3)
-
-
4. A power amplifier (PA) comprising:
-
a first signal path for signals in a first frequency band, the first signal path comprising a first amplification stage and a second amplification stage; a second signal path for signals in a second frequency band, the second signal path comprising a first amplification stage and a second amplification stage; a first bias circuit comprising an output coupled to the first amplification stage of the first signal path and the first amplification stage of the second signal path and configured to provide a first bias signal to the first amplification stage of the first signal path and the first amplification stage of the second signal path such that the first bias circuit is shared between the first signal path and the second signal path; a second bias circuit comprising an output coupled to the second amplification stage of the first signal path and the second amplification stage of the second signal path and configured to provide a second bias signal to the second amplification stage of the first signal path and the second amplification stage of the second signal path such that the second bias circuit is shared between the first signal path and the second signal path; a first bypass capacitor coupled between the output of the first bias circuit and ground such that the first bypass capacitor is shared between the first signal path and the second signal path; and a second bypass capacitor coupled between the output of the second bias circuit and ground such that the second bypass capacitor is shared between the first signal path and the second signal path. - View Dependent Claims (5)
-
Specification