Semiconductor device and electronic device including analog/digital converter
First Claim
1. A semiconductor device comprising:
- an analog/digital converter including an oscillation circuit and a counter circuit, wherein the counter circuit is configured to perform addition or subtraction of a count value in the counter circuit;
a photo sensor electrically connected to the oscillation circuit, to input a first signal to the oscillation circuit; and
a signal line electrically connected to the counter circuit, the signal line being arranged so as to select one of a state in which the counter circuit performs the addition of the count value and a state in which the counter circuit performs the subtraction of the count value,wherein the oscillation circuit is configured to output a second signal obtained by converting the first signal to the counter circuit, the second signal having an oscillation frequency in accordance with the first signal,wherein the counter circuit is configured to perform the addition of the count value by using the second signal as a clock signal or perform the subtraction of the count value by using the second signal as a clock signal,wherein the photo sensor includes a photodiode and a transistor,wherein the photodiode is a pin photodiode,wherein the transistor includes a region overlapping with a p-type layer of the photodiode or an n-type layer of the photodiode through an insulating film, andwherein an i-type layer of the photodiode includes a region not overlapping with the transistor.
1 Assignment
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Accused Products
Abstract
Noise in a semiconductor device including a photo sensor is reduced. The semiconductor device includes an analog/digital converter and a photo sensor including a photodiode. The analog/digital converter includes an oscillation circuit and a counter circuit. A first signal output from the photo sensor is input to the oscillation circuit. The oscillation circuit has a function of outputting a second signal obtained by a change in oscillation frequency of the first signal. The counter circuit has a count function by which addition or subtraction is performed by a control signal with the second signal used as a clock signal. The counter circuit performs subtraction during the reset operation of the photo sensor. The counter circuit performs addition during the selection operation of the photo sensor. Thus, the output value of the analog/digital converter can be corrected.
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Citations
31 Claims
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1. A semiconductor device comprising:
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an analog/digital converter including an oscillation circuit and a counter circuit, wherein the counter circuit is configured to perform addition or subtraction of a count value in the counter circuit; a photo sensor electrically connected to the oscillation circuit, to input a first signal to the oscillation circuit; and a signal line electrically connected to the counter circuit, the signal line being arranged so as to select one of a state in which the counter circuit performs the addition of the count value and a state in which the counter circuit performs the subtraction of the count value, wherein the oscillation circuit is configured to output a second signal obtained by converting the first signal to the counter circuit, the second signal having an oscillation frequency in accordance with the first signal, wherein the counter circuit is configured to perform the addition of the count value by using the second signal as a clock signal or perform the subtraction of the count value by using the second signal as a clock signal, wherein the photo sensor includes a photodiode and a transistor, wherein the photodiode is a pin photodiode, wherein the transistor includes a region overlapping with a p-type layer of the photodiode or an n-type layer of the photodiode through an insulating film, and wherein an i-type layer of the photodiode includes a region not overlapping with the transistor. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A semiconductor device comprising:
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an analog/digital converter including an oscillation circuit and a counter circuit, wherein the counter circuit is configured to perform addition or subtraction of a count value in the counter circuit; a photo sensor including a photodiode, a first transistor, and a second transistor; and a signal line electrically connected to the counter circuit, the signal line being arranged so as to select one of a state in which the counter circuit performs the addition of the count value and a state in which the counter circuit performs the subtraction of the count value, wherein a first terminal of the photodiode is electrically connected to a first wiring, wherein a second terminal of the photodiode is electrically connected to a gate of the first transistor, wherein one of a source and a drain of the first transistor is electrically connected to a second wiring, wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, wherein the other of the source and the drain of the second transistor is electrically connected to a third wiring configured to output a first signal, wherein a gate of the second transistor is electrically connected to a fourth wiring, wherein the oscillation circuit is configured to output a second signal obtained by converting the first signal to the counter circuit, the second signal having an oscillation frequency in accordance with the first signal, wherein the counter circuit is configured to perform the addition of the count value by using the second signal as a clock signal or perform the subtraction of the count value by using the second signal as a clock signal, wherein the photodiode is a pin photodiode, wherein the second transistor includes a region overlapping with a p-type layer of the photodiode or an n-type layer of the photodiode through an insulating film, and wherein an i-type layer of the photodiode includes a region not overlapping with the second transistor. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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19. A semiconductor device comprising:
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an analog/digital converter including an oscillation circuit and a counter circuit, wherein the counter circuit is configured to perform addition or subtraction of a count value in the counter circuit; a pixel portion including a photo sensor, the photo sensor including a photodiode, a first transistor, and a second transistor; and a signal line electrically connected to the counter circuit, the signal line being arranged so as to select one of a state in which the counter circuit performs the addition of the count value and a state in which the counter circuit performs the subtraction of the count value, wherein a first terminal of the photodiode is electrically connected to a first wiring, wherein a second terminal of the photodiode is electrically connected to a gate of the first transistor, wherein one of a source and a drain of the first transistor is electrically connected to a second wiring, wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, wherein the other of the source and the drain of the second transistor is electrically connected to a third wiring configured to output a first signal, wherein a gate of the second transistor is electrically connected to a fourth wiring, wherein the oscillation circuit is configured to output a second signal obtained by converting the first signal to the counter circuit, the second signal having an oscillation frequency in accordance with the first signal, wherein the counter circuit is configured to perform the addition of the count value by using the second signal as a clock signal or perform the subtraction of the count value by using the second signal as a clock signal, wherein the photodiode is a pin photodiode, wherein the second transistor includes a region overlapping with a p-type layer of the photodiode or an n-type layer of the photodiode through an insulating film, and wherein an i-type layer of the photodiode includes a region not overlapping with the second transistor. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30)
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31. A semiconductor device comprising:
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a photo sensor; and a readout circuit, wherein the readout circuit comprises an analog/digital converter, wherein a signal output from the photo sensor is input to the readout circuit, wherein the photo sensor comprises a photodiode and a transistor, wherein the photodiode is a lateral junction pin diode, wherein the transistor comprises an oxide semiconductor in a channel formation region, wherein the transistor includes a region overlapping with a p-type layer or an n-type layer of the photodiode, and wherein the transistor does not overlap with an i-type layer of the photodiode.
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Specification