Microfluidic devices with integrated resistive heater electrodes including systems and methods for controlling and measuring the temperatures of such heater electrodes

• US 9,873,122 B2
• Filed: 02/14/2013
• Issued: 01/23/2018
• Est. Priority Date: 08/29/2007
• Status: Active Grant

• Current Assignee: Canon USA, Inc. (Canon Inc.)
• Original Assignee: Canon USA, Inc. (Canon Inc.)
• Inventors: Coursey, Johnathan S.
• Primary Examiner(s): LAU, TUNG S
• Application Number:
  US13/767,465
• Publication Number:
  US 20130164191A1
• Time in Patent Office: 1,804 Days
• Field of Search: 702133
• CPC Class Codes: B01L 2300/0816 Cards, e.g. flat sample carriers usually with flow in two horizontal directions
• CPC Class Codes: B01L 2300/1827 using resistive heater
• CPC Class Codes: B01L 3/5027 by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip B01L3/5023 takes precedence; micromixers B01F33/30; microreactors for synthesis B01J19/0093; microcapillary devices in general B81B1/00
• CPC Class Codes: B01L 7/00 Heating or cooling apparatus autoclaves B01J3/04; Heat insulating devices
• CPC Class Codes: B01L 7/525 with physical movement of samples between temperature zones
• CPC Class Codes: G01R 27/02 Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant by measuring phase angle only G01R25/00

Abstract

The invention relates to methods and devices for control of an integrated thin-film device with a plurality of microfluidic channels. In one embodiment, a microfluidic device is provided that includes a microfluidic chip having a plurality of microfluidic channels and a plurality of multiplexed heater electrodes, wherein the heater electrodes are part of a multiplex circuit including a common lead connecting the heater electrodes to a power supply, each of the heater electrodes being associated with one of the microfluidic channels. The microfluidic device also includes a control system configured to regulate power applied to each heater electrode by varying a duty cycle, the control system being further configured to determine the temperature of each heater electrode by determining the resistance of each heater electrode.

Claims

1. A method for determining a selected characteristic of at least one electronic component in a network comprising more than one of said electronic components to control power supplied to the at least one electronic component, wherein all electronic components in the network are all either of resistive type, inductive type, or capacitive type, the method comprising the steps of:

a. generating N distinct partitions of the components, wherein

N is equal to the number of components in the network,

each partition divides the components into at least a source set and a drain set, wherein the source set and the drain set don'"'"'t have common components and

at least one of the source set and the drain set in each partition comprises two or more of the components;

b. for each partition;

(1) connecting a source voltage to each component in the source set, wherein the drain set is disconnected from the source voltage, wherein the source set does not include the source voltage,

(2) connecting a drain voltage to each component in the drain set, and

(3) measuring the equivalent selected characteristic of a circuit between the source voltage and the drain voltage, wherein the circuit comprises a parallel combination of each component in the source set in series with a parallel combination of each component in the drain set and the drain voltage is measured at the drain set;

c. computing the selected characteristic of the at least one component based at least in part on the stored equivalent characteristics; and

d. controlling power supplied to the at least one electronic component in the network based on the computed characteristic of the at least one component.

2. The method of claim 1, wherein:

each of the components is included in the source set for a number S of the N partitions, and

each of the components is included in the drain set for a number D of the N partitions.

3. The method of claim 1, wherein:

the number of components in the source set is respectively the same in each partition, and

the number of components in the drain set is respectively the same in each partition.

4. The method of claim 1, wherein each partition further includes a third set of components not included in the source set or the drain set.

5. The method of claim 1, wherein the components are resistive elements and the selected characteristic is resistance.

6. The method of claim 1, wherein the components are inductive elements and the selected characteristic is inductance.

7. The method of claim 1, wherein the components are capacitive elements and the selected characteristic is capacitance.

8. The method of claim 1, wherein computing the selected characteristic of the at least one component comprises providing an initial estimate and iteratively refining the estimate based at least in part on the stored equivalent characteristics until the successive refinements are below a predetermined threshold.

9. The method of claim 1, wherein the step of connecting a source voltage to each component in the source set and connecting a drain voltage to each component in the drain set comprises activating digital switches to effectuate the connections.

10. The method of claim 1, further comprising:

providing pulse width modulated power source to each of the electronic components;

wherein the steps of connecting a source voltage to each component in the source set, connecting a drain voltage to each component in the drain set, measuring the equivalent selected characteristic of a circuit between the source voltage and the drain voltage, storing the measured equivalent selected characteristic, and computing the selected characteristic of the at least one component occur during the off time of the pulse width modulated power source.

11. The method of claim 3 wherein:

the source sets for each of the partitions are respectively unique, and

the drain sets for each of the partitions are respectively unique.

12. The method of claim 9, wherein the digital switches are field effect transistors.