Systems and methods for drive circuits for dynamic magnetic stripe communications devices

• US 9,875,437 B2
• Filed: 02/18/2016
• Issued: 01/23/2018
• Est. Priority Date: 02/16/2010
• Status: Active Grant

• Current Assignee: Dynamics Inc.
• Original Assignee: Dynamics Inc.
• Inventors: Cloutier, Bruce S., Lambeth, David, Workley, James H.
• Primary Examiner(s): St Cyr, Daniel
• Application Number:
  US15/047,036
• Publication Number:
  US 20160162713A1
• Time in Patent Office: 705 Days
• Field of Search: 235488, 235492, 235493
• CPC Class Codes: G06K 19/06206 the magnetic marking being emulated
• CPC Class Codes: G06K 7/10297 arrangements for handling protocols designed for non-contact record carriers such as RFIDs NFCs, e.g. ISO/IEC 14443 and 18092 cryptographic protocols H04L9/00; network security protocols H04L63/00; real-time communication protocols in data switching networks H04L65/00; network protocols for data switching network services H04L67/00
• CPC Class Codes: H04W 4/80 Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication

Abstract

Dynamic magnetic stripe communications devices are provided as magnetic stripe emulators. A magnetic stripe emulator may include a coil. Drive circuits may be coupled to this coil in order to produce electromagnetic fields from the coil operable to communicate with a magnetic stripe reader.

Claims

1. A method, comprising:

supplying a first mute signal to a first drive circuit;

applying power to the first drive circuit after the supplying a first mute signal;

releasing the first mute signal;

supplying a first drive signal to a first wireless communications device;

supplying a second mute signal to a second drive circuit;

applying power to the second drive circuit after the supplying a second mute signal;

releasing the second mute signal; and

supplying a second drive signal to a second wireless communications device.

2. The method of claim 1, further comprising:

detecting a reader;

supplying a third mute signal to the first drive circuit; and

removing power from the first drive circuit after the supplying a third mute signal,

wherein the supplying a first mute signal and the supplying a second mute signal are in response to the detecting a reader.

3. The method of claim 1, further comprising:

setting circuitry for low-power operation.

4. The method of claim 1, further comprising:

detecting a reader;

supplying a third mute signal to the first drive circuit;

removing power from the first drive circuit after the supplying a third mute signal; and

setting circuitry for low-power operation,

wherein the supplying a first mute signal and the supplying a second mute signal are in response to the detecting a reader.

5. The method of claim 1, further comprising:

detecting a reader,

wherein the supplying a first mute signal and the supplying a second mute signal are in response to the detecting a reader.

6. The method of claim 1, wherein the supplying a first drive signal to a first wireless communications device further comprises supplying the first drive signal to a dynamic magnetic stripe device.

7. The method of claim 1, further comprising wirelessly communicating data via an antenna.

8. The method of claim 1, further comprising wirelessly communicating data via an antenna connected to an IC chip.

9. The method of claim 1, further comprising wirelessly communicating data via an RFID antenna.

10. The method of claim 1, further comprising wirelessly communicating data via a coil.

11. A device, comprising:

a first wireless communications device;

a second wireless communications device;

a first drive circuit operable to provide a first drive signal to the first wireless communications device based on a first input signal and a first mute signal;

a second drive circuit operable to provide a second drive signal to the second wireless communications devices based on a second input signal and a second mute signal; and

a processor.

12. The device of claim 11, further comprising a control circuit operable to provide a power control signal to the first drive circuit.

13. The device of claim 11, further comprising a control circuit operable to provide a power control signal to the first drive circuit and the second drive circuit.

14. The device of claim 11, further comprising a control circuit operable to provide a power control signal to the first wireless communications device.

15. The device of claim 11, further comprising a control circuit operable to provide a power control signal to the first wireless communications device and the second wireless communications device.

16. The device of claim 11, wherein the processor is operable to provide the first input signal and the first mute signal to the first drive circuit.

17. The device of claim 11, wherein the processor is operable to provide the first input signal and the first mute signal to the first drive circuit, and the second input signal and the second mute signal to the second drive circuit.

18. The device of claim 11, further comprising:

a third drive circuit operable to provide a third drive signal to a third wireless communications device based on a third input signal and a third mute signal; and

a control circuit operable to provide a power control signal to the first drive circuit, the second drive circuit, the third drive circuit, the first wireless communications device, the second wireless communications device, and the third wireless communications device,

wherein the processor is operable to communicate the first input signal and the first mute signal to the first drive circuit, the second input signal and the second mute signal to the second drive circuit, the third input signal and the third mute signal to the third drive circuit, and a control signal to the control circuit.

19. The device of claim 11, further comprising:

a third drive circuit operable to provide a third drive signal to a third wireless communications device based on a third input signal and a third mute signal,

wherein the processor is operable to communicate a first power control signal, the first input signal, and the first mute signal to the first drive circuit, a second power control signal, the second input signal, and the second mute signal to the second drive circuit, and a third power control signal, the third input signal, and the third mute signal to the third drive circuit.

20. The device of claim 11, further comprising:

a third drive circuit operable to provide a third drive signal to a third wireless communications device based on a third input signal and a third mute signal,

wherein the processor is operable to communicate a first power control signal, the first input signal, and the first mute signal to the first drive circuit, a second power control signal, the second input signal, and the second mute signal to the second drive circuit, a third power control signal, the third input signal, and the third mute signal to the third drive circuit, a fourth power control signal to the first wireless communications device, a fifth power control signal to the second wireless communications device, and a sixth power control signal to the third wireless communications device.