Zero voltage switching

• US 9,876,430 B2
• Filed: 04/17/2017
• Issued: 01/23/2018
• Est. Priority Date: 03/24/2008
• Status: Active Grant

• Current Assignee: Solaredge Technologies Incorporated
• Original Assignee: Solaredge Technologies Incorporated
• Inventors: Glovinsky, Tzachi
• Primary Examiner(s): Laxton, Gary L
• Application Number:
  US15/488,858
• Publication Number:
  US 20170288546A1
• Time in Patent Office: 281 Days
• CPC Class Codes: H02M 1/34 Snubber circuits
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load
• CPC Class Codes: H02M 7/4811 having auxiliary actively switched resonant commutation circuits connected to intermediate DC voltage or between two push-pull branches
• CPC Class Codes: H02M 7/5387 in a bridge configuration
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A method for providing non-resonant zero-voltage switching in a switching power converter. The switching power converter converts power from input power to output power during multiple periodic switching cycles. The switching power converter includes a main switch and an auxiliary capacitor adapted for connecting to the main switch, and an inductor connectible to the auxiliary capacitor. When the main switch is on, a previously charged (or previously discharged) auxiliary capacitor is connected to the main switch with auxiliary switches. The main switch is switched off with zero voltage while discharging non-resonantly (charging) the auxiliary capacitor by providing a current path to the inductor. The auxiliary capacitor is disconnected from the main switch. The voltage of the auxiliary capacitor is charged and discharged alternatively during subsequent switching cycles. The voltage of the auxiliary capacitor stays substantially the same until the subsequent turn off of the main switch during the next switching cycle with substantially no energy loss in the auxiliary capacitor.

Claims

1. A method comprising:

charging, through a first switch, a capacitor during a first switching cycle when the first switch is closed at a first time;

discharging the capacitor to an output terminal through an inductor connected between a first node and the output terminal when the first switch is open; and

charging, through a second switch, the capacitor during a second switching cycle when the second switch is closed at a second time.

2. The method of claim 1, further comprising:

discharging the capacitor to the output terminal when the second switch is off.

3. The method of claim 1, wherein discharging the capacitor further comprises discharging the capacitor to an additional output terminal through an additional inductor connected between a second node and the additional output terminal.

4. The method of claim 3, wherein the inductor and the additional inductor are connected in series.

5. The method of claim 1, wherein connecting the capacitor across the first switch comprises connecting the capacitor using a bidirectional switch unit.

6. The method of claim 5, wherein the bidirectional switch unit comprises a plurality of bidirectional switches arranged in a full bridge topology.

7. The method of claim 6, one or more of the plurality of bidirectional switches comprises first and second switch-diode pairs arranged in series.

8. The method of claim 7, wherein diodes in the first and second switch-diode pairs are connected in opposite directions.

9. The method of claim 1, further comprising

charging the capacitor with current from the inductor during one or more switching cycles.

10. The method of claim 9, wherein charging the capacitor with current from the inductor comprises inverting a voltage across the capacitor.

11. A method comprising:

charging a capacitor through a first switch of a plurality of main switches;

diverting current from an inductor to the capacitor through at least one bidirectional switch of a plurality of bidirectional switches while the first switch is off;

inverting a charge on the capacitor; and

charging the capacitor across through a second switch of the plurality of main switches.

12. The method of claim 11, wherein the plurality of main switches are arranged in a full bridge topology.

13. The method of claim 11, wherein the plurality of bidirectional switches are arranged in a full bridge topology.

14. The method of claim 11, further comprising:

diverting current from the inductor to the capacitor through a different bidirectional switch from the at least one bidirectional switch when the second switch while the second switch is off.

15. The method of claim 11, wherein a voltage across the first switch is substantially zero while the current is diverted from the inductor to the capacitor.

16. A method comprising:

connecting a first terminal of a capacitor to a first voltage source via a first main switch of a plurality of main switches and a first bidirectional switch of a plurality of bidirectional switches;

connecting a second terminal of a capacitor to a second voltage source via a second main switch of the plurality of main switches and a second bidirectional switch of the plurality of bidirectional switches;

disconnecting the first and second terminals from the first and second voltage sources by turning the first and second main switches off;

diverting current from a first inductor to the first terminal via the first bidirectional switch; and

diverting current from a second inductor to the second terminal via the second bidirectional switch.

17. The method of claim 16, further comprising inverting a charge on the capacitor.

18. The method of claim 16, wherein the first voltage source is a positive voltage source and the second voltage source is a negative voltage source.

19. The method of claim 16, wherein the voltages across the first and second main switches is substantially zero when the current is diverted from the first and second inductors.

20. The method of claim 16, wherein the first and second inductors are connected in series.