Active rectifier capable of preventing reverse leakage current

• US 9,876,440 B1
• Filed: 12/29/2016
• Issued: 01/23/2018
• Est. Priority Date: 09/29/2016
• Status: Active Grant

• Current Assignee: Skaichips Company Limited
• Original Assignee: SungKyunKwan University's Research & Business Foundation (SungKyunKwan University)
• Inventors: Lee, Kang Yoon, Oh, Seong Jin, Yang, Youngoo, Hwang, Keum Cheol, Park, Young Jun, Kim, Sang Yun, Jang, Byeong Gi, Kim, Jung Yeon
• Primary Examiner(s): Finch, III, Fred E
• Assistant Examiner(s): De Leon Domenech, Rafael O
• Application Number:
  US15/394,160
• Time in Patent Office: 390 Days
• CPC Class Codes: H02M 1/081 wherein the phase of the control voltage is adjustable with reference to the AC source
• CPC Class Codes: H02M 7/217 using semiconductor devices only
• CPC Class Codes: H02M 7/219 in a bridge configuration
• CPC Class Codes: H02M 7/2195 the switches being synchronously commutated at the same frequency of the AC input voltage
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

Disclosed herein is an active rectifier. The rectifier includes a rectifier unit, a driver unit, and a switching device control circuit unit. The rectifier unit includes first and fourth transistors configured to become conductive when the voltage of an alternating current (AC) input is negative and apply the current of the AC input to a rectifier capacitor, and second and third transistors configured to become conductive when the voltage of the AC input is positive and apply the current of the AC input to the rectifier capacitor. The driver unit outputs first to fourth drive control signals, and drives the first to fourth transistors. The switching device control circuit unit compares the first drive control signal and the second drive control signal with the AC input, and outputs switching device control signals to delay the first to fourth drive control signals based on the extents to delay.

Claims

1. An active rectifier, comprising:

a rectifier unit comprising;

first and fourth transistors configured to become conductive in an interval in which voltage of an alternating current (AC) input is negative, and to apply current of the AC input to a rectifier capacitor; and

second and third transistors configured to become conductive in an interval in which the voltage of the AC input is positive, and to apply the current of the AC input to the rectifier capacitor;

a driver unit configured to output first to fourth drive control signals to gates of the first to fourth transistors; and

a switching device control circuit unit configured to compare the first drive control signal applied to the gate of the first transistor and the second drive control signal applied to the gate of the second transistor with the AC input, and to output switching device control signals adapted to delay the first to fourth drive control signals based on extents to which the first and second drive control signals are delayed.

2. The active rectifier of claim 1, further comprising a feedback control switch configured to control whether the first drive control signal and the second drive control signal are input to the switching device control circuit unit.

3. The active rectifier of claim 2, wherein the switching device control circuit unit is further configured to compare the first drive control signal and the second drive control signal with the AC input, and to turn off the feedback control switch, in response to the first drive control signal and the second drive control signal not being delayed.

4. The active rectifier of claim 1, wherein the switching device control circuit unit comprises:

control circuit modules configured to receive the first drive control signal, the second drive control signal and the AC input, to compare the first drive control signal and the second drive control signal with the AC input, and to output delay extent control signals indicative of the extents to which the first and second drive control signals are delayed; and

open-type delay circuit modules configured to receive the AC input, to process the AC input signal into a signal required for delay control, to receive the delay extent control signals output from the control circuit module, and to output the switching device control signals, wherein the switching device control signals are adapted to match the extents to which the first and second drive control signals are delayed to an extent of delay of the AC input using the signal required for delay control and the delay extent control signals.

5. The active rectifier of claim 4, wherein each of the control circuit modules comprises:

a voltage limiter configured to output the received AC input as a square waveform AC input; and

a digital phase detector configured to compare the square waveform AC input with the received first drive control signal, and to output an up/down counter signal corresponding to a corresponding one of the delay extent control signals.

6. The active rectifier of claim 5, wherein the digital phase detector is further configured to increase or decrease a low side select comprising a control signal adapted to cause a multiplexer to select a signal input to a lower SR latch among the latches, wherein the lower SR latch is configured to output an output signal, in response to the selecting of the signal input to the lower SR latch.

7. The active rectifier of claim 6, wherein the driver unit comprises upper and lower drivers exhibiting delays to calculate a high side select by decreasing the low side select by a value, wherein the high side select is output to compensate for a difference between the delays.

8. The active rectifier of claim 4, wherein each of the open-type delay circuit modules comprises:

a voltage limiter configured to output the received AC input as a square waveform AC input;

an edge detector configured to output a signal obtained by detecting an edge of the square waveform AC input output from the voltage limiter;

a delay line configured to receive the signal output from the edge detector, and to output signals obtained by delaying the signal output from the edge detector by various times;

a multiplexer configured to select and output any one of the signals obtained by delaying the signal output from the edge detector by the various times and output from the delay line, by receiving and using one of the delay extent control signals; and

SR latches each configured to receive the signal output from the edge detector and the signal output from the multiplexer, and to output the switching device control signal.

9. The active rectifier of claim 8, wherein the delay line comprises a coarse delay cell and fine delay cells.