Method and apparatus for adapting the data transmission security in a serial bus system

• US 9,880,956 B2
• Filed: 03/29/2012
• Issued: 01/30/2018
• Est. Priority Date: 04/06/2011
• Status: Active Grant

• Current Assignee: Robert Bosch GmbH
• Original Assignee: Robert Bosch GmbH
• Inventors: Hartwich, Florian
• Primary Examiner(s): Tsai, Henry
• Assistant Examiner(s): Bartels, Christopher
• Application Number:
  US14/110,179
• Publication Number:
  US 20140201410A1
• Time in Patent Office: 2,133 Days
• Field of Search: None
• CPC Class Codes: G06F 13/362 with centralised access control
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247
• CPC Class Codes: H03M 13/091 Parallel or block-wise CRC computation
• CPC Class Codes: H04L 1/0061 Error detection codes
• CPC Class Codes: H04L 1/0083 Formatting with frames or packets; Protocol or part of protocol for error control
• CPC Class Codes: H04L 12/4013 Management of data rate on the bus systems modifying transmission characteristics according to link quality H04L1/0001
• CPC Class Codes: H04L 12/40169 Flexible bus arrangements arrangements for maintenance or administration involving management of faults; events, alarms H04L41/06; automatic restoration of network faults H04L41/0654
• CPC Class Codes: H04L 12/4135 using bit-wise arbitration
• CPC Class Codes: H04L 2001/0094 Bus
• CPC Class Codes: H04L 2012/40215 Controller Area Network CAN

Abstract

In a bus system that includes at least two subscribed data processing units that exchange messages via a bus in a serial data transmission, the transmitted messages are of a logical structure that includes a start-of-frame bit, an arbitration field, a control field, a data field, a CRC field, an acknowledge field and an end-of-frame sequence, the control field including a data length code, which contains information regarding the length of the data field. The CRC field of the messages can include any of two or more different numbers of bits depending on a value of an associated switchover condition (UB3).

Claims

1. A method for serial data transmission processing in a bus system that includes a bus and at least two subscribed data processing units that are configured to exchange messages via the bus, the method comprising:

obtaining a message transmitted by one of the at least two subscribed data processing units and on the bus, wherein the message is structured according to a predefined logical structure that includes a start-of-frame bit, an arbitration field, a control field including a data length code, a data field, a CRC field, an acknowledge field, and an end-of-frame sequence;

determining, by a computer processor, a value of a first switchover condition, the value of the switchover condition being based on one of a bit and a bit combination in the message; and

based on the determined value of the switchover condition, determining a number of bits included in the CRC field.

2. The method of claim1, wherein the processor is configured for processing CRC fields of a plurality of messages, which CRC fields differ with respect to a respective number of bits included in the respective CRC fields.

3. The method of claim 1, wherein the logical structure is according to the CAN standard ISO 11898-1.

4. The method of claim 1, further comprising:

determining, based on an identification in at least one of the arbitration field and the control field, whether the message is of a type that the number of bits of the CRC field of which is dependent on the value of the switchover condition.

5. The method of claim 4, wherein the value of the switchover condition is ascertained based on the identification, the message being differently processed depending on the determined number of bits included in the CRC field.

6. The method of claim 5, wherein content of the data length code is also determined based on the identification.

7. The method of claim 1, wherein the value of the switchover condition is ascertained based on content of the data length code, the message being differently processed depending on the determined number of bits included in the CRC field.

8. The method of claim 1, further comprising:

responsive to obtaining a beginning of the obtained message, initiating calculation of at least two CRC checksums in parallel using different generator polynomials; and

selecting between respective results of the at least two CRC checksums based on the determined value of the switchover condition.

9. The method of claim 8, wherein one of the CRC checksum calculations is performed using a combination of contents of the CRC field and stuff bits of fields preceding the CRC field, and the stuff bits are not used for another of the CRC checksum calculations.

10. The method of claim 8, further comprising:

calculating a CRC checksum, wherein, responsive to satisfaction of a condition that the value of the switchover condition meets a predetermined criterion, the calculation of the CRC checksum is performed using a combination of contents of the CRC field and stuff bits of fields preceding the CRC field.

11. The method of claim 1, further comprising:

determining a value of a second switchover condition;

interpreting the data length code to determine a length of the data field;

wherein the interpretation of the data length code is performed according to an assignment of a combination of all values of the data length code to a first range of lengths if the determined value of the second switchover condition is a first value, and the interpretation of the data length code is performed according to an assignment of a combination of all values of the data length code to a second range of lengths if the determined value of the second switchover condition is a second value, the second range including and being larger than the first range.

12. The method of claim 11, wherein the largest length of the first range is 8 bytes and the largest length of the second range is greater than 8 bytes.

13. The method of claim 12, wherein, if the determined value of the second switchover condition is the second value, each possible combination of bits of the data length code is assigned to a different respective data field length than all other combinations of the bits of the data length code.

14. The method of claim 11, wherein the value of the second switchover condition is one of derived from and set to be consistent with the value of the first switchover condition.

15. The method of claim 11, wherein the processor is configured to determine the value of the second switchover condition from an identification in at least one of the arbitration field and the control field.

16. The method of claim 11, wherein, according to the assignments to the first range of lengths and to the second range of lengths, values between 0b0001 and 0b1000 of the data length code are interpreted as respective ones of data field sizes of 1 to 8 bytes, and, according to the assignment to the second range of lengths and not according to the assignment to the first range of lengths, remaining values between 0b1001 and 0b1111 of the data length code are interpreted as respective ones of data field sizes that are greater than 8 bytes.

17. The method of claim 11, wherein the data length code includes four bits and, if the determined value of the second switchover condition is the second value, the four bits of the data length code are interpreted at least partially in deviation from the CAN standard ISO 11898-1.

18. The method of claim 17, wherein the processor is configured to determine from at least one of the arbitration field and the control field whether the message is of a first type for which interpretation of the data length code is to be limited to the first range of lengths or is of a second type for which interpretation of the data length code is expandable to the second larger range of lengths depending on the value of the second switchover condition.

19. The method of claim 1, further comprising:

interpreting the data length code to determine a length of the data field;

wherein the processor is configured to determine from an identification in at least one of the arbitration field and the control field whether the message is of a first type for which interpretation of the data length code is to be limited to a first range of lengths or is of a second type for which interpretation of the data length code is to be expanded to a second larger range of lengths.

20. The method of claim 1, wherein, as a function of a value of a second switchover condition, different values for bit length in time are assigned to different parts of the obtained message.

21. The method of claim 20, wherein the bit length in time assigned to a first part of the message is specified at at least a minimum time value, and the bit length in time assigned to a second part of the message is less than the minimum time value.

22. The method of claim 21, wherein the minimum time value is one microsecond.

23. The method of claim 20, the different values for bit length in time are implemented by using at least two different scaling factors for setting a bus time unit relative to a smallest time unit or to an oscillator clock pulse in ongoing operation.

24. The method of claim 20, further comprising:

based on an identification in at least one of the arbitration field and the control field, determining whether the different values for bit length in time are assigned to the message.

25. The method of claim 24, wherein the identification is also used by the processor to determine at least one of the number of bits included in the CRC field and a range of lengths of the data field to which values of the data length code are assignable.

26. The method of claim 20, wherein whether the different values for bit length in time are assigned to the message is determined based on the value of the second switchover condition, and the value of the second switchover condition is at least one of derivable from and the same as the value of the first switchover condition.

27. The method of claim 1, wherein a first identification bit at least one of indicates the value of the first switchover condition and indicates whether the data field, whose length is indicated by the data length code, can include more than 8 bytes, the first identification bit being an extended data length (EDL) bit positioned between the last bit of the arbitration field and the first bit of the data length code, at a position at which messages that are according to the CAN standard ISO 11898-1 include a bit defined by the CAN standard ISO 11898-1.

28. The method of claim 1, wherein:

a first identification bit indicates the value of the first switchover condition, the first identification bit being an extended data length (EDL) bit positioned between the last bit of the arbitration field and the first bit of the data length code, at a position at which messages that are according to the CAN standard ISO 11898-1 include a bit defined by the CAN standard ISO 11898-1; and

a second identification bit indicates whether the data field, whose length is indicated by the data length code, can include more than 8 bytes, the second identification bit being positioned between the first identification bit and the first bit of the data length code.

29. The method of claim 1, wherein:

a first identification bit indicates the value of the first switchover condition, the first identification bit being an extended data length (EDL) bit positioned between the last bit of the arbitration field and the first bit of the data length code, at a position at which messages that are according to the CAN standard ISO 11898-1 include a bit defined by the CAN standard ISO 11898-1; and

a second identification bit is a bit rate switch (BRS) bit that indicates whether different values for bit length in time are assigned to different parts of the message, the second identification bit being positioned between the first identification bit and the first bit of the data length code.

30. The method of claim 1, wherein the message is one that was transmitted in a time-controlled manner in accordance with the TTCAN standard ISO 11898-4.

31. The method of claim 1, wherein the at least two subscribed data processing units are both control units of one of a motor vehicle and an industrial installation.

32. The method of claim 1, wherein one of the at least two subscribed data processing units is a control unit of one of a motor vehicle and an industrial installation, and the other of the at least two subscribed data processing units is a control unit that is (a) external to the one of the motor vehicle and industrial installation and (b) connectable over the bus to the control unit of the motor vehicle.

33. The method of claim 1, further comprising:

selecting one generator polynomial from at least two different generator polynomials depending on the determined value of the switchover condition; and

using the selected generator polynomial for determining a content of the CRC field.

34. The method of claim 33, wherein, for at least one value of the switchover condition:

(a) the number of bits determined to be included in the CRC field is that which conforms to the CAN standard ISO 11898-1, and (b) the selected generator polynomial conforms to the CAN standard ISO 11898-1.

35. A data processing device, which is one of a plurality of data processing devices subscribed to a bus of a bus system for exchanging messages over the bus via serial data transmission, the data processing device comprising:

a processor configured to;

obtain a message transmitted on the bus by another of the plurality of data processing devices, wherein the message is structured according to a predefined logical structure that includes a start-of-frame bit, an arbitration field, a control field including a data length code, a data field, a CRC field, an acknowledge field, and an end-of-frame sequence;

determine a value of a first switchover condition, the value of the switchover condition being based on one of a bit and a bit combination in the message;

based on the determined value of the switchover condition, determine a number of bits included in the CRC field.

36. The device of claim 35, further comprising:

a plurality of shift registers, wherein the processor is configured to use the shift registers for calculating content of the CRC field with alternatively selectable generator polynomials, where which of the generator polynomials is selected depends on the value of the first switchover condition.

37. The device of claim 35, further comprising:

a plurality of shift registers, wherein the processor is configured;

responsive to obtaining a beginning of the obtained message, initiate calculation of at least two CRC checksums in parallel using different generator polynomials and using the shift registers; and

select between respective results of the at least two CRC checksums based on the determined value of the first switchover condition.

38. The data processing device of claim 35, wherein the processor is further configured to:

select one generator polynomial from at least two different generator polynomials depending on the determined value of the switchover condition; and

use the selected generator polynomial for determining a content of the CRC field.

39. A method for serial data transmission processing in a bus system that includes a bus and at least two subscribed data processing units that are configured to exchange messages via the bus, the method comprising:

transmitting a plurality of messages by one of the at least two subscribed data processing units and on the bus, wherein each of the messages is structured according to a predefined logical structure that includes a start-of-frame bit, an arbitration field, a control field including a data length code, a data field, a CRC field, an acknowledge field, and an end-of-frame sequence, and wherein a number of bits included in the CRC field differs between different ones of the plurality of messages depending on a value of a switchover condition that is based on one of a bit and a bit combination in at least one of the messages.

40. The method of claim 39, wherein one generator polynomial is selected from at least two different generator polynomials depending on the determined value of a switchover condition, and wherein the selected generator polynomial is used for determining a content of the CRC field.