Encapsulated accelerator

• US 9,880,964 B2
• Filed: 02/23/2015
• Issued: 01/30/2018
• Est. Priority Date: 12/09/2010
• Status: Active Grant

• Current Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Original Assignee: SolarFlare Communications Incorporated (Advanced Micro Devices, Inc.)
• Inventors: Pope, Steven L.
• Primary Examiner(s): Survillo, Oleg
• Application Number:
  US14/629,394
• Publication Number:
  US 20150161064A1
• Time in Patent Office: 1,072 Days
• Field of Search: 709250
• CPC Class Codes: G06F 12/1081 for peripheral access to main memory, e.g. direct memory access [DMA]
• CPC Class Codes: G06F 13/102 where the programme performs an interfacing function, e.g. device driver G06F13/105 takes precedence; scheduling within device drivers G06F9/52; contention policies within device drivers G06F9/4881
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices
• CPC Class Codes: G06F 13/4221 being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
• CPC Class Codes: G06F 2213/0058 Bus-related hardware virtualisation
• CPC Class Codes: G06F 2213/3808 Network interface controller
• CPC Class Codes: G06Q 40/04 Trading; Exchange, e.g. stocks, commodities, derivatives or currency exchange
• CPC Class Codes: H04L 49/9068 in the network interface card

Abstract

A data processing system comprising a host computer system and a network interface device for connection to a network, the host computer system and network interface device being coupled together by means of a data bus, and: the network interface device comprising: a controller unit having a first data port for connection to a network, a second data port, and a data bus interface connected to said data bus, the controller unit being operable to perform, in dependence on the network endpoints to which data packets received at the network interface device are directed, switching of data packets between the first and second data ports and the data bus interface; and an accelerator module having a first medium access controller coupled to said second data port of the controller unit and a processor operable to perform one or more functions in hardware on data packets received at the accelerator module, the said first medium access controller being operable to support one or more first network endpoints; the host computer system supporting: a plurality of guest software domains including a first guest software domain having an application; and a privileged software domain configured to present a virtual operating platform to said plurality of guest domains, the privileged software entity including a first software driver for the controller unit but not including a second software driver for the accelerator module; wherein the application is configured to access the accelerator module by means of one or more first data packets formed in accordance with a predetermined network protocol and directed to one or more of the first network endpoints.

Claims

1. A network interface device comprising:

a controller unit having a first data port for connection to a network, a second data port, and a data bus interface for connection to a host computer system, the first data port having a first medium access controller and the second data port having a second medium access controller, the controller having a switch which, in dependence on the network endpoints to which data packets received at the network interface device are directed, switches of data packets between the first and second data ports and the data bus interface; and

an accelerator module having a third data port having a third medium access controller, said third data port being coupled to said second data port of the controller unit, said accelerator module comprising hardware which in use performs one or more functions in hardware on data packets received at the accelerator module;

wherein said third medium access controller in use supports one or more first network endpoints such that, in use, data packets identified by the controller unit as being directed to said one or more first network endpoints are sent over the second data port to the third port of the accelerator module.

2. The network interface device as claimed in claim 1, wherein the said one or more functions performed by the hardware are non-communications functions.

3. The network interface device as claimed in claim 2, wherein the said one or more functions performed by the hardware do not include functions relating to the performance of network communications protocols in use at the network interface device.

4. The network interface device as claimed in claim 1, wherein the said one or more functions performed by the hardware do not include functions relating to the performance of network communications protocols in use at the network interface device.

5. The network interface device as claimed in claim 1, wherein the one or more functions performed by the hardware include one or more of:

normalisation of financial information prior to storage at a memory of the accelerator module or transmission to a host computer system accessible over the data bus interface;

serialisation of trades directed to a financial exchange;

analysis of scientific data;

digital audio and/or video processing; and

in-line cryptographic functions.

6. The network interface device as claimed in claim 1, wherein the first data port of the network interface device includes a medium access controller coupled to a physical layer transceiver.

7. The network interface device as claimed in claim 1, wherein the second medium access controller is coupled to a second serial interface device, and the first medium access controller of the accelerator module is coupled to the second data port by means of a first serial interface device, said first and second serial interface devices being connected so as to allow the communication of data between the second data port and the accelerator module.

8. The network interface device as claimed in claim 1, wherein the second medium access controller is coupled to a second physical layer transceiver, and the first medium access controller of the accelerator module is coupled to the second data port by means of a first physical layer transceiver, said first and second physical layer transceivers being connected so as to allow the communication of data between the second data port and the accelerator module.

9. The network interface device as claimed in claim 7, wherein the controller unit and the accelerator module are provided at separate peripheral devices and the controller unit is coupled to the accelerator module by a connection between the first serial interface device and the second serial interface device.

10. The network interface device as claimed in claim 9, wherein the separate peripheral devices are located on separate integrated circuit chips.

11. The network interface device as claimed in claim 1, further comprising:

at the accelerator module, a DMA controller and a data bus interface;

wherein the controller unit is configured to provide a virtual interface of the network interface device that includes said second media access controller but not a physical layer transceiver, and the DMA interface is configurable so as to allow the accelerator module to exchange data with said virtual interface of the network interface device over a DMA channel.

12. The network interface device as claimed in claim 11, further comprising a data bus bridge arranged for connecting the data bus interface of the hardware accelerator and the data bus interface of the controller unit to a data bus.

13. The network interface device as claimed in claim 11, wherein the controller unit and the accelerator module are provided at separate peripheral devices and their respective data bus interfaces are configured for connection to a data bus.

14. The network interface device as claimed in claim 13, wherein the separate peripheral devices are located on separate integrated circuit chips.

15. The network interface device as claimed in claim 12, wherein the data bus is a PCIe data bus and the virtual interface supports one or more SR-IOV or MR-IOV virtual configurations.

16. The network interface device as claimed in claim 1, wherein the accelerator module further comprises a memory configured for storing data generated by the said one or more functions performed by the hardware.

17. The network interface device as claimed in claim 16, wherein the accelerator module is operable to receive data packets from a host computer system accessible over the data bus interface and the accelerator module is configured to, in response to receiving a data packet including a read request directed to the memory, respond to the read request by encapsulating the requested data in one or more data packets for transmission to a network endpoint identified in the read request.

18. The network interface device as claimed in claim 17, wherein the accelerator module is configured to respond only to read requests received from a predetermined set of one or more network endpoints or over a predetermined set of one or more DMA channels.

19. The network interface device as claimed in claim 1, wherein the first medium access controller is an Ethernet MAC and the one or more first network endpoint are identified by an Ethernet address.

20. The network interface device as claimed in claim 1, wherein the hardware is an FPGA integrated circuit.