Method for driving electro-optic displays

• US 9,881,565 B2
• Filed: 03/01/2017
• Issued: 01/30/2018
• Est. Priority Date: 02/02/2010
• Status: Active Grant

• Current Assignee: E Ink Holdings Incorporated
• Original Assignee: E Ink Holdings Incorporated
• Inventors: Bishop, Seth
• Primary Examiner(s): Bukowski, Kenneth
• Application Number:
  US15/446,118
• Publication Number:
  US 20170243547A1
• Time in Patent Office: 335 Days
• CPC Class Codes: G09G 2300/026 Video wall, i.e. juxtaposition of a plurality of screens to create a display screen of bigger dimensions
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 3/2092 Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165
• CPC Class Codes: G09G 3/344 based on particles moving in a fluid or in a gas, e.g. electrophoretic devices electrophoretic devices per se G02F1/167
• CPC Class Codes: G09G 3/3453 based on rotating particles or microelements
• CPC Class Codes: G09G 3/38 using electrochromic devices

Abstract

A large area display having multiple sub-units arranged in rows and columns and a method of driving the multiple sub-units as a single display are provided. Each sub-unit has an associated pixel row driver and pixel column driver. The large area display may also include a chip select means that provides a separate chip select signal to the pixel row driver of each row of sub-units, so that in the row of sub-units for which the associated row driver has received the chip select signal, only the rows of pixels within a single row of sub-units are supplied data at any one time. Column data and delayed Gate Start Pulse signals are fed to the pixel column drivers in each column of sub-units such that the appropriate column data values are supplied to the associated pixel column drivers.

Claims

1. A method of driving a large area display comprising a plurality of sub-units arranged in a plurality of rows and columns of sub-units, each sub-unit having an associated pixel row driver and an associated pixel column driver, the sub-units within each column of subunits being interconnected such that the associated pixel column drivers drive the pixel column electrodes of all the sub-units within the column of subunits such that the plurality of sub-units of the large area display are driven as a single display, the method comprising:

sequentially providing a separate chip select signal to each pixel row driver associated with a row of sub-units,

sequentially supplying data to the drivers of each row of pixels in the row of sub-units for which the associated row driver has received the chip select signal so that only the drivers of the rows of pixels within a single row of sub-units are supplied data at any one time,

supplying column data to a first shift register of a first column driver as a series of column data values under the control of a Gate Start Pulse signal, and

supplying the column data to a second shift register of a second column driver as a series of column data values under the control of a delayed Gate Start Pulse signal.

2. A method according to claim 1 wherein the Gate Start Pulse signals are provided to a programmable logic device which generates the delayed Gate Start Pulse signal at a time appropriate for the second column driver to begin receiving data.

3. A method according to claim 2 wherein the column data are supplied to the first and second column drivers as a series of column data extending across all the pixel columns in all the sub-units, and the delayed Gate Start Pulse signal causes bits 1 to N of the series of data (where N is an integer equal to the number of columns in the sub-units of the first column) to be placed in the first shift register of the first column driver, and bits (N+1 ) to 2N to be placed in the second shift register of the second column driver.

4. A large area display comprising:

a plurality of sub-units arranged in a plurality of rows and columns of sub-units, each sub-unit having an associated pixel row driver and an associated pixel column driver, the sub-units within each column of sub-units being interconnected such that the associated pixel column driver drives the pixel column electrodes of all the sub-units within the column of sub-units;

chip select means for providing a separate chip select signal to the pixel row driver of each row of sub-units, so that in the row of sub-units for which the associated pixel row driver has received the chip select signal, only the rows of pixels within a single row of sub-units is supplied data at any one time;

column data supply means for supplying column data to the pixel column drivers as a series of column data values;

means for feeding, for each pixel column scanned, delayed Gate Start Pulse signals to the pixel column drivers in each column of sub-units after the first so that the pixel column drivers in each column of sub-units after the first receive the delayed Gate Start Pulse signals and such that the appropriate column data values are supplied to the associated pixel column drivers; and

wherein the plurality of sub-units of the large area display are driven as a single display.

5. A large area display according to claim 4 wherein the means for feeding delayed Gate Start Pulse signals comprises means for generating Gate Start Pulse and Gate Clock signals, the Gate Start Pulse signal indicating the start of a new row of data and the Gate Clock signal indicating that a new column data value is to be supplied, and a programmable logic device which receives the Gate Start Pulse and Gate Clock signals and generates the delayed Gate Start Pulse signals.

6. A large area display according to claim 5 wherein the column data supply means is arranged to supply the column data to the column drivers as a series of column data extending across all the columns in all the sub-units of a row of sub-units, and the means for feeding delayed Gate Start Pulse signals are arranged to cause bits 1 to N of the series of data (where N is a integer equal to the number of columns in the sub-units of the first column) to be placed in shift registers of the column drivers in the first column of sub-units, and bits (N+1 ) to 2N to be placed in shift registers of the column drivers in the second column of sub-units.

7. A large area display according to claim 4 further comprising optical means arranged along an edge between adjacent sub-units and is configured to reduce an apparent width of a gap between the sub-units.

8. A large area display according to claim 7 wherein the optical means comprises a lens molded into a viewing surface of a sub-unit.

9. A large area display according to claim 4 further comprising a layer of an electro-optic medium applied over the sub-units.

10. A large area display according to claim 9, wherein the electro-optic medium is at least one of a rotating bichromal member or electrochromic electro-optic medium.

11. A large area display according to claim 9, wherein the electrophoretic medium comprises a plurality of electrically charged particles disposed in a fluid, the plurality of electrically charged particles being capable of moving through the fluid under the influence of an electric field.

12. A large area display according to claim 11 wherein the electrically charged particles and the fluid are confined within a plurality of capsules or microcells.

13. A large area display according to claim 11 wherein the electrically charged particles and the fluid are present as a plurality of discrete droplets surrounded by a continuous phase comprising a polymeric material.

14. An electro-optic display according to claim 11 wherein the fluid is gaseous.