Vertical structure LEDs

• US 9,882,084 B2
• Filed: 09/09/2016
• Issued: 01/30/2018
• Est. Priority Date: 04/09/2002
• Status: Expired due to Term

• Current Assignee: Suzhou Lekin Semiconductor Company Limited
• Original Assignee: LG Innotek Company Limited (LG Corporation)
• Inventors: Lee, Jong Lam, Jeong, In-kwon, Yoo, Myung Cheol
• Primary Examiner(s): Mandala, Victor A
• Application Number:
  US15/261,172
• Publication Number:
  US 20160380151A1
• Time in Patent Office: 508 Days
• CPC Class Codes: H01C 7/006 Thin film resistors
• CPC Class Codes: H01C 7/008 Thermistors H01C7/02 - H01C7/06 take precedence
• CPC Class Codes: H01L 27/0802 Resistors only
• CPC Class Codes: H01L 28/20 Resistors
• CPC Class Codes: H01L 33/0025 comprising only AIIIBV compounds
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/36 characterised by the electrodes
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/40 Materials therefor
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: Y10S 438/958 Passivation layer
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate

Abstract

A vertical light emitting diode structure, comprising: a support structure including a support substrate and a metallic layer, the metallic layer being disposed on the support substrate; a GaN-based semiconductor structure including a first-type semiconductor layer on the support structure, an active layer on the first-type semiconductor layer, and a second-type semiconductor layer on the active layer, the GaN-based semiconductor structure including a bottom surface proximate to the support structure, a top surface opposite to the bottom surface, and a side surface between the top surface and the bottom surface, a thickness of the GaN-based semiconductor structure from the bottom surface to the top surface being less than 5 micro meters, and a ratio of a thickness of the second-type semiconductor layer to the thickness of the GaN-based semiconductor structure being not less than 60%; a first contact layer disposed between the support structure and the GaN-based semiconductor structure to be electrically connected to the first-type semiconductor layer, a thickness of the first contact layer being less than the thickness of the first-type semiconductor layer; a second contact layer disposed on the GaN-based semiconductor structure to be electrically connected to the second-type semiconductor layer, the second contact layer including titanium and aluminum; a metal pad disposed on the second contact layer, the metal pad including gold; and a passivation layer being in contact with the support structure, the passivation layer extending from the support structure to the top surface of the GaN-based semiconductor structure via the side surface of the GaN-based semiconductor structure.

Claims

1. A vertical light emitting diode structure, comprising:

a support structure including a support substrate and a metallic layer, the metallic layer being disposed on the support substrate;

a GaN-based semiconductor structure including a first-type semiconductor layer on the support structure, an active layer on the first-type semiconductor layer, and a second-type semiconductor layer on the active layer, the GaN-based semiconductor structure including a bottom surface proximate to the support structure, a top surface opposite to the bottom surface, and a side surface between the top surface and the bottom surface, a thickness of the GaN-based semiconductor structure from the bottom surface to the top surface being less than 5 micro meters, and a ratio of a thickness of the second-type semiconductor layer to the thickness of the GaN-based semiconductor structure being more than 60%;

a first contact layer disposed between the support structure and the GaN-based semiconductor structure to be electrically connected to the first-type semiconductor layer, a thickness of the first contact layer being less than a thickness of the first-type semiconductor layer;

a second contact layer disposed on the GaN-based semiconductor structure to be electrically connected to the second-type semiconductor layer, the second contact layer including titanium and aluminum;

a metal pad disposed on the second contact layer, the metal pad including gold; and

a passivation layer being in contact with the support structure, the passivation layer extending from the support structure to the top surface of the GaN-based semiconductor structure via the side surface of the GaN-based semiconductor structure.

2. The structure according to claim 1, wherein a ratio of the thickness of the GaN-based semiconductor structure to a thickness of the support structure is less than 0.1.

3. The structure according to claim 1, wherein the passivation layer comprises an opening such that a top surface of the second contact layer is not covered by the passivation layer.

4. The structure according to claim 2, wherein a width of the first contact layer is equal to or smaller than a width of the GaN-based semiconductor structure, and

wherein a width direction is perpendicular to a thickness direction of the GaN-based semiconductor structure from the bottom surface thereof to the top surface thereof.

5. The structure according to claim 3, wherein a width of the first contact layer is equal to or smaller than a width of the GaN-based semiconductor structure, and

wherein a width direction is perpendicular to a thickness direction of the GaN-based semiconductor structure from the bottom surface thereof to the top surface thereof.

6. The structure according to claim 2, wherein the support structure comprises at least one material of copper, titanium, and tungsten.

7. The structure according to claim 3, wherein the support structure comprises at least one material of copper, titanium, and tungsten.

8. The structure according to claim 3, wherein the passivation layer is disposed on the top surface of the second contact layer, and

wherein the opening of the passivation layer is covered by the metal pad such that the passivation layer is disposed between the second contact layer and the metal pad.

9. The structure according to claim 8, wherein the first contact layer comprises at least one material of platinum and gold.

10. The structure according to claim 8, wherein the support substrate of the support structure comprises copper, titanium, tungsten, or aluminum, and

wherein the metallic layer of the support structure is disposed on a top surface of the support substrate.

11. The structure according to claim 2, wherein the passivation layer comprises:

a first portion being directly in contact with a top surface of the support structure;

a second portion disposed on the side surface of the GaN-based semiconductor structure; and

a third portion disposed on the top surface of the GaN-based semiconductor structure.

12. The structure according to claim 3, wherein the passivation layer comprises:

a first portion being directly in contact with a top surface of the support structure;

a second portion disposed on the side surface of the GaN-based semiconductor structure; and

a third portion disposed on the top surface of the GaN-based semiconductor structure.

13. The structure according to claim 11, wherein a length of the first portion of the passivation layer is shorter than both a length of the second portion of the passivation layer and a length of the third portion of the passivation layer.

14. The structure according to claim 12, wherein a length of the first portion of the passivation layer is shorter than both a length of the second portion of the passivation layer and a length of the third portion of the passivation layer.

15. The structure according to claim 11, wherein the passivation layer comprises:

a fourth portion disposed on a side of the second contact layer; and

a fifth portion disposed on the top surface of the second contact layer,

wherein a length of the fourth portion is larger than the fifth portion.

16. The structure according to claim 12, wherein the passivation layer comprises:

a fourth portion disposed on a side of the second contact layer; and

a fifth portion disposed on the top surface of the second contact layer,

wherein a length of the fourth portion is larger than the fifth portion.

17. The structure according to claim 2, wherein the thickness of the first contact layer is less than 10 nano meters,

wherein the support substrate of the support structure is about 50 micro meters,

wherein the thickness of the first-type semiconductor layer is 0.05 micro meters, and

wherein the second-type semiconductor layer comprises 2 micro meters-thick undoped GaN layer and 1 micro meter-thick silicon doped GaN layer.