Method for separating epitaxial layers from growth substrates, and semiconductor device using same

• US 9,882,085 B2
• Filed: 02/10/2016
• Issued: 01/30/2018
• Est. Priority Date: 03/19/2012
• Status: Expired due to Fees

• Current Assignee: Seoul Viosys Co., Ltd. (Seoul Semiconductor Co., Ltd.)
• Original Assignee: Seoul Viosys Co., Ltd. (Seoul Semiconductor Co., Ltd.)
• Inventors: Heo, Jeong Hun, Choi, Joo Won, Lee, Choong Min, Shin, Su Jin, Nam, Ki Bum, Han, Yu Dae, Lee, A Ram Cha
• Primary Examiner(s): Ha, Nathan W
• Application Number:
  US15/040,969
• Publication Number:
  US 20160172539A1
• Time in Patent Office: 720 Days
• CPC Class Codes: H01L 21/0243 Surface structure
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02494 Structure
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02664 Aftertreatments planarisation in general H01L21/304
• CPC Class Codes: H01L 29/0657 characterised by the shape of the body
• CPC Class Codes: H01L 33/0075 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/025 Physical imperfections, e.g. particular concentration or distribution of impurities
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/24 of the light emitting region, e.g. non-planar junction

Abstract

The present invention relates to a method for separating epitaxial layers and growth substrates, and to a semiconductor device using same. According to the present invention, a semiconductor device is provided which comprises a supporting substrate and a plurality of semiconductor layers provided on the supporting substrate, wherein the uppermost layer of the semiconductor layers has a surface of non-uniform roughness.

Claims

1. A semiconductor device comprising:

a support substrate; and

a plurality of semiconductor layers formed on the support substrate including a first type semiconductor layer, an active layer formed over the first type semiconductor layer, a second type semiconductor layer formed over the active layer;

a sacrificial layer formed over the second type semiconductor layer and having voids within the sacrificial layer, the voids operating to provide non-uniform roughness to a surface of the sacrificial layer; and

a growth substrate formed on the sacrificial layer and having a surface with a convex portion and a concave portion.

2. The semiconductor device according to claim 1, wherein the surface of the sacrificial layer comprises a cut surface of the sacrificial layer.

3. The semiconductor device according to claim 1, wherein the surface of the sacrificial layer comprises an exposed inner surface of a cut void.

4. The semiconductor device according to claim 1, wherein the surface of the sacrificial layer comprises a plurality of V-shaped etched grooves formed by an etching liquid for etching the sacrificial layer.

5. The semiconductor device according to claim 1, wherein the sacrificial layer comprises an open region exposing another semiconductor layer under the sacrificial layer.

6. The semiconductor device according to claim 1, wherein the semiconductor device comprises a light emitting diode.

7. The semiconductor device according to claim 1, wherein the sacrificial layer among the semiconductor layers comprises unmerged grooves on the surface thereof.

8. The semiconductor device according to claim 1, wherein the sacrificial layer among the semiconductor layers comprises a convex-concave pattern and a rough surface.

9. The semiconductor device according to claim 8, wherein the rough surface comprises two surfaces having different roughness degrees.

10. The semiconductor device according to claim 8, wherein one of the two surfaces having different roughness degrees has the convex-concave pattern.

11. The semiconductor device according to claim 8, wherein one of the two surfaces having different roughness degrees comprises a surface formed by breaking a layer comprising cavities.

12. A semiconductor device comprising:

a support substrate; and

a first semiconductor layer formed over the support substrate;

a second semiconductor layer formed over the first semiconductor layer;

an active layer formed over the first semiconductor layer and under the second semiconductor layer;

a sacrificial layer formed over the second semiconductor layer and including voids, the voids operating to provide portions including discrete cut surfaces; and

a growth substrate formed on the sacrificial layer and having a surface with a convex portion and a concave portion.

13. The semiconductor device according to claim 12, wherein each portion of the sacrificial layer has non-uniform roughness along a surface of each portion.

14. The semiconductor device according to claim 12, wherein between the portions of the sacrificial layer, a V-shaped groove is formed.

15. The semiconductor device according to claim 12, wherein the portions include a first portion and a second portion that are connected to each other.

16. The semiconductor device according to claim 12, wherein the portions include a first portion and a second portion that are spaced apart from each other.

17. The semiconductor device according to claim 12, wherein the semiconductor device includes a light emitting diode.