In-cell mutual-capacitive touch panel and trace layout thereof

• US 9,891,745 B2
• Filed: 09/18/2015
• Issued: 02/13/2018
• Est. Priority Date: 10/17/2014
• Status: Expired due to Fees

• Current Assignee: Raydium Semiconductor Corporation
• Original Assignee: Raydium Semiconductor Corporation
• Inventors: Lee, Kun-Pei, Hsu, Yu-Chin, Lin, Yi-Ying
• Primary Examiner(s): Lubit, Ryan A
• Application Number:
  US14/858,457
• Publication Number:
  US 20160110008A1
• Time in Patent Office: 879 Days
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/04164 Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
• CPC Class Codes: G06F 3/044 by capacitive means
• CPC Class Codes: G06F 3/0443 using a single layer of sensing electrodes

Abstract

An in-cell mutual-capacitive touch panel having low RC loading and its trace layout are disclosed. A first conductive layer and a second conductive layer are used as bridge of TX electrode and MFL electrode above an active area of in-cell mutual-capacitive touch panel. The second conductive layer and a transparent conductive layer are used as bridge of TX electrode and MFL electrode at the lower-side out of the active area. Cooperated with at least one driving IC having more than two sets of TX electrode pins and MFL electrode pins and the number of the at least one driving IC is determined according to the size of the in-cell mutual-capacitive touch panel. At the same time, the second conductive layer has traces in parallel distributed in the same electrode area of the active area. Therefore, the RC loading of the in-cell mutual-capacitive touch panel of the invention can be largely reduced.

Claims

1. An in-cell mutual-capacitive touch panel, comprising:

a plurality of pixels, a laminated structure of each pixel comprising;

a substrate;

a thin-film transistor layer disposed above the substrate, a first conductive layer and a second conductive layer being integrated in the thin-film transistor layer, wherein the second conductive layer is connected with a transparent conductive layer coupled to a common voltage;

a liquid crystal layer, disposed above the thin-film transistor layer;

a color filtering layer, disposed above the liquid crystal layer; and

a glass layer, disposed above the color filtering layer;

wherein the first conductive layer and a part of the second conductive layer are used as bridges of a transmitter electrode and a multi-function electrode out of an upper-side of an active area of the in-cell mutual-capacitive touch panel;

another part of the second conductive layer and the transparent conductive layer are used as bridges of the transmitter electrode and the multi-function electrode out of a lower-side of the active area of the in-cell mutual-capacitive touch panel;

the in-cell mutual-capacitive touch panel is coupled to at least one driving IC having more than two sets of transmitter electrode pins and multi-function electrode pins;

the number of the at least one driving IC is determined according to a size of the in-cell mutual-capacitive touch panel, and the at least one driving IC is disposed out of the active area of the in-cell mutual-capacitive touch panel.

2. The in-cell mutual-capacitive touch panel of claim 1, the second conductive layer comprises a plurality of traces, wherein at least two traces of the second conductive layer are aligned in parallel within the active area of the in-cell mutual-capacitive touch panel.

3. The in-cell mutual-capacitive touch panel of claim 1, wherein the in-cell mutual-capacitive touch panel is applied to displays using in-plane switching liquid crystal (IPS) technology, fringe field switching (FFS) technology, or advanced hyper-viewing angle (AHVA) technology.

4. The in-cell mutual-capacitive touch panel of claim 1, wherein the color filtering layer comprises a color filter and a black matrix resist.

5. The in-cell mutual-capacitive touch panel of claim 4, wherein the first conductive layer and the second conductive layer are disposed under the black matrix resist.

6. The in-cell mutual-capacitive touch panel of claim 1, wherein the first conductive layer and the second conductive layer are coupled.

7. The in-cell mutual-capacitive touch panel of claim 1, wherein the first conductive layer and the second conductive layer are aligned horizontally, perpendicularly, or in a mesh type.

8. The in-cell mutual-capacitive touch panel of claim 1, wherein the second conductive layer disposed above the transparent conductive layer is connected with the transparent conductive layer through a via.

9. The in-cell mutual-capacitive touch panel of claim 1, wherein the second conductive layer disposed under the transparent conductive layer is connected with the transparent conductive layer through a via.

10. The in-cell mutual-capacitive touch panel of claim 1, wherein the transmitter electrode, the multi-function electrode, and a receiver electrode cover different parts of the plurality of pixels, and the multi-function electrode is disposed between the transmitter electrode and the receiver electrode.

11. The in-cell mutual-capacitive touch panel of claim 10, wherein transparent conductive layers in the pixels covered by the transmitter electrode are connected, transparent conductive layers in the pixels covered by the receiver electrode are connected, and transparent conductive layers in the pixels covered by the multi-function electrode are connected.

12. The in-cell mutual-capacitive touch panel of claim 1, wherein the transparent conductive layer is an indium tin oxide (ITO) layer.

13. An in-cell mutual-capacitive touch panel, comprising:

a plurality of pixels, a laminated structure of each pixel comprising;

a substrate;

a thin-film transistor layer disposed above the substrate, a first conductive layer and a second conductive layer being integrated in the thin-film transistor layer, wherein the first conductive layer, a source electrode, and a drain electrode are formed of the same material using the same process on the same layer, and the first conductive layer is connected with a transparent conductive layer coupled to a common voltage, the transparent conductive layer is disposed above the first conductive layer;

a liquid crystal layer, disposed above the thin-film transistor layer;

a color filtering layer, disposed above the liquid crystal layer; and

a glass layer, disposed above the color filtering layer.

14. The in-cell mutual-capacitive touch panel of claim 13, wherein the in-cell mutual-capacitive touch panel is suitable for displays using in-plane switching liquid crystal (IPS) technology, fringe field switching (FFS) technology, or advanced hyper-viewing angle (AHVA) technology.

15. The in-cell mutual-capacitive touch panel of claim 13, wherein the color filtering layer comprises a color filter and a black matrix resist.

16. The in-cell mutual-capacitive touch panel of claim 15, wherein the first conductive layer and the second conductive layer are disposed under the black matrix resist.

17. The in-cell mutual-capacitive touch panel of claim 13, wherein the second conductive layer is connected with the first conductive layer through a via.

18. The in-cell mutual-capacitive touch panel of claim 13, wherein the second conductive layer is not connected with the first conductive layer.

19. The in-cell mutual-capacitive touch panel of claim 13, wherein the transparent conductive layer is an indium tin oxide (ITO) layer.