Thin film transistor device, method for manufacturing same and display device

• US 9,893,088 B2
• Filed: 04/24/2014
• Issued: 02/13/2018
• Est. Priority Date: 05/29/2013
• Status: Active Grant

• Current Assignee: JDI Design and Development GK
• Original Assignee: JOLED Inc.
• Inventors: Sugawara, Yuta
• Primary Examiner(s): Junge, Bryan
• Application Number:
  US14/894,148
• Publication Number:
  US 20160133650A1
• Time in Patent Office: 1,391 Days
• CPC Class Codes: G02F 1/1362 Active matrix addressed cells G02F1/134336, G02F1/134363 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10K 50/844 Encapsulations
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements
• CPC Class Codes: H10K 59/873 Encapsulations

Abstract

A thin film transistor device including: a substrate; a gate electrode; an electrode pair composed of a source electrode and a drain electrode; a channel layer; and a passivation layer. The channel layer is made of an oxide semiconductor. The passivation layer includes a first layer, a second layer, and a third layer layered one on top of another in this order with the first layer closest to the substrate. The first layer is made of one of silicon oxide, silicon nitride, and silicon oxynitride, the second layer is made of an Al compound, and the third layer is made of one of silicon oxide, silicon nitride, and silicon oxynitride.

Claims

1. A thin film transistor device comprising:

a substrate;

a gate electrode above the substrate;

a channel layer above the gate electrode;

an electrode pair on the channel layer, the electrode pair composed of a source electrode and a drain electrode that are spaced from one another;

a passivation layer extending over the gate electrode, the channel layer, and the electrode pair, the passivation layer having a hole penetrating therethrough in a thickness direction; and

an electrically-conductive layer having a portion extending along an inner wall of the passivation layer defining the hole in the passivation layer, and a portion connecting to one of the gate electrode, the source electrode, and the drain electrode at a bottom of the hole in the passivation layer,

wherein

the channel layer is made of an oxide semiconductor,

the passivation layer includes a first layer, a second layer, and a third layer layered one on top of another in this order with the first layer closest to the substrate, the first layer made of one of silicon oxide, silicon nitride, and silicon oxynitride, the second layer made of an Al compound, the third layer made of silicon nitride,

the passivation layer further includes a fourth layer on the third layer, the fourth layer made of silicon nitride, and

the fourth layer contains silicon nitride at a lower density than the third layer.

2. A thin film transistor device comprising:

a substrate;

a gate electrode above the substrate;

a channel layer above the gate electrode;

an electrode pair on the channel layer, the electrode pair composed of a source electrode and a drain electrode that are spaced from one another;

a passivation layer extending over the gate electrode, the channel layer, and the electrode pair, the passivation layer having a hole penetrating therethrough in a thickness direction; and

an electrically-conductive layer having a portion extending along an inner wall of the passivation layer defining the hole in the passivation layer, and a portion connecting to one of the gate electrode, the source electrode, and the drain electrode at a bottom of the hole in the passivation layer,

wherein

the channel layer is made of an oxide semiconductor,

the passivation layer includes a first layer, a second layer, and a third layer layered one on top of another in this order with the first layer closest to the substrate, the first layer made of one of silicon oxide, silicon nitride, and silicon oxynitride, the second layer made of an Al compound, the third layer made of silicon oxide,

the passivation layer further includes a fourth layer on the third layer, the fourth layer made of one of silicon nitride and silicon oxynitride,

at least one of the source electrode and the drain electrode contains Cu or a Cu alloy,

the fourth layer has a thickness of at least 200 nm, and

the third layer has a thickness of at least 100 nm.

3. A thin film transistor device comprising:

a substrate;

a gate electrode above the substrate;

a channel layer above the gate electrode;

an electrode pair on the channel layer, the electrode pair composed of a source electrode and a drain electrode that are spaced from one another; and

a passivation layer extending over the gate electrode, the channel layer, and the electrode pair, the passivation layer having a hole penetrating therethrough in a thickness direction,

wherein

the channel layer is made of an oxide semiconductor, and

the passivation layer includes a first layer, a second layer, and a third layer layered one on top of another in this order with the first layer closest to the substrate, the first layer made of one of silicon oxide, silicon nitride, and silicon oxynitride, the second layer made of an Al compound, the third layer made of one of silicon oxide, silicon nitride, and silicon oxynitride,

the thin film transistor device further comprises an interlayer insulating layer between the first layer and at least one of the gate electrode, the source electrode, and the drain electrode,

the interlayer insulating layer has a hole penetrating therethrough and overlapping with the hole in the passivation layer, and

the thin film transistor device further comprises an electrically-conductive layer having a portion extending along an inner wall of the interlayer insulating layer defining the hole in the interlayer insulating layer, a portion connecting to one of the gate electrode, the source electrode, and the drain electrode at a bottom of the hole in the interlayer insulating layer, and a portion residing between the interlayer insulating layer and the first layer.