Hardware interconnect based communication between solid state drive controllers

• US 9,898,195 B2
• Filed: 12/09/2013
• Issued: 02/20/2018
• Est. Priority Date: 12/09/2013
• Status: Expired due to Fees

• Current Assignee: Empire Technology Development LLC (Allied Inventors Management, LLC)
• Original Assignee: Empire Technology Development LLC (Allied Inventors Management, LLC)
• Inventors: Margalit, Mordehai, Hirshberg, David, Moriya, Netzer
• Primary Examiner(s): Padmanabhan, Mano
• Assistant Examiner(s): Baughman, William E
• Application Number:
  US14/371,706
• Publication Number:
  US 20150242128A1
• Time in Patent Office: 1,534 Days
• CPC Class Codes: G06F 3/0608 Saving storage space on storage systems
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0641 De-duplication techniques
• CPC Class Codes: G06F 3/0658 Controller construction arrangements
• CPC Class Codes: G06F 3/0665 at area level, e.g. provisioning of virtual or logical volumes
• CPC Class Codes: G06F 3/0673 Single storage device
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays
• CPC Class Codes: G06F 3/0689 Disk arrays, e.g. RAID, JBOD

Abstract

Technologies are generally described to establish a hardware interconnect based communication between SSD controllers. According to some examples, a first solid state drive (SSD) controller and a second SSD controller are detected. The hardware interconnect is detected between the first SSD controller and the second SSD controller. Next, a communication connection between the first SSD controller and the second SSD controller is established through the hardware interconnect. The first SSD controller may be allowed to manage a flash controller of the second SSD controller for tasks that include a deduplication task and a low level redundant array of independent disks (RAID) task.

Claims

1. A method to establish a hardware interconnect based communication between solid state drive (SSD) controllers, the method comprising:

detecting a first solid state drive (SSD) controller within a first SSD system, wherein the first SSD controller is connected to a first flash memory;

detecting a second SSD controller within a second SSD system, wherein the second SSD controller is connected to a second flash memory, wherein the first SSD system is different from the second SSD system, and wherein the first flash memory and the second flash memory are separately dedicated to the first SSD controller and the second SSD controller respectively;

detecting the hardware interconnect between the first SSD controller and the second SSD controller;

establishing a communication connection between the first SSD controller and the second SSD controller through the hardware interconnect;

allowing the second SSD controller to manage a flash controller of the first SSD controller through the hardware interconnect for tasks that include a deduplication task and a low level redundant array of independent disks (RAID) task;

providing an addressing scheme to support a two level mapping and an intersystem communication mapping through the established communication connection between the first SSD controller and the second SSD controller;

implementing cross-SSD computing to switch communication of the first flash memory from the first SSD controller to the second SSD controller while maintaining the established communication connection between the first SSD controller and the second SSD controller; and

implementing one or more functions associated with the first SSD controller and the second SSD controller through the hardware interconnect such that the first SSD controller and the second SSD controller perform the one or more functions interchangeably and are configured to communicate with each other to distribute the performance of the one or more functions, wherein the one or more functions include at least one from a set of;

a cross processor replication, a RAID, and a read and write (RW) management.

2. The method of claim 1, further comprising:

detecting a third SSD controller;

detecting another hardware interconnect between the second SSD controller and the third SSD controller; and

establishing another communication connection between the second SSD controller and the third SSD controller through the another hardware interconnect.

3. The method of claim 1, further comprising managing a communication bus associated with the communication connection between the first SSD controller and the second SSD controller as a first extension of a first device input and output (I/O) of the first SSD controller and a second extension of a second device I/O of the second SSD controller.

4. The method of claim 1, further comprising:

implementing a multi-controller architecture that provides a multi-system addressing scheme.

5. The method of claim 4, further comprising:

allowing the first SSD controller to manage a flash controller of the second SSD controller for tasks that include at least one of;

a deduplication task and a low level RAID task.

6. A computing device to establish hardware interconnects based communication between solid state drive (SSD) controllers, the computing device comprising:

a memory configured to store instructions;

a processor; and

a solid state drive (SSD) system coupled to the memory and the processor, wherein the SSD system includes an interconnect module configured to;

detect a first SSD controller within the SSD system, wherein the first SSD controller is connected to a first flash memory;

detect a second SSD controller within another SSD system of the computing device, wherein the second SSD controller is connected to a second flash memory, and

wherein the first flash memory and the second flash memory are separately dedicated to the first SSD controller and the second SSD controller respectively;

detect a hardware interconnect between the first SSD controller and the second SSD controller;

establish a first communication connection between the first SSD controller and the second SSD controller through the hardware interconnect;

allow the second SSD controller to manage a flash controller of the first SSD controller through the hardware interconnect for tasks that include a second deduplication task and a second low level redundant array of independent disks (RAID) task;

detect a third SSD controller;

detect another hardware interconnect between the second SSD controller and the third SSD controller;

establish a second communication connection between the second SSD controller and the third SSD controller through the another hardware interconnect;

provide an addressing scheme to support a two level mapping and an intersystem communication mapping through the established first communication connection between the first SSD controller and the second SSD controller;

implement cross-SSD computing to switch communication of the first flash memory from the first SSD controller to the second SSD controller while maintaining the established first communication connection between the first SSD controller and the second SSD controller; and

implement one or more functions associated with the first SSD controller, the second SSD controller, and the third SSD controller through the respective hardware interconnects such that the first SSD controller, the second SSD controller, and the third SSD controller perform the one or more functions interchangeably and are configured to communicate with each other to distribute the performance of the one or more functions, wherein the one or more functions include at least one from a set of;

a cross processor replication, a RAID, and a read and write (RW) management.

7. The computing device according to claim 6, wherein the interconnect module is further configured to:

manage a communication bus associated with the communication connection between the first SSD controller and the second SSD controller as a first extension of a first device input and output (I/O) of the first SSD controller and a second extension of a second device I/O of the second SSD controller.

8. The computing device according to claim 6, wherein the interconnect module is further configured to:

implement a multi-controller architecture to provide a multi-system addressing scheme through a process to

allow the first SSD controller to manage a flash controller of the second SSD controller for tasks that include at least one of;

a first deduplication task and a first low level RAID task.

9. The computing device according to claim 6, wherein the interconnect module is further configured to:

implement a scalable file system to offload functions from at least one SSD system associated with the first SSD controller and the second SSD controller;

create data and associated metadata within the scalable file system; and

update the metadata through the hardware interconnect with no overload of the at least one SSD system and a network connection associated with the at least one SSD system.

10. A non-transitory computer-readable storage medium with executable instructions stored thereon to establish hardware interconnects based communication between solid state drive (SSD) controllers, the instructions in response to execution, cause an interconnect module to execute or control performance of operations wherein the operations comprise:

detect a first solid state drive (SSD) controller within a first SSD system, wherein the first SSD controller is connected to a first flash memory;

detect a second SSD controller within a second SSD system, wherein the second SSD controller is connected to a second flash memory, wherein the first SSD system is different from the second SSD system, and wherein the first flash memory and the second flash memory are separately dedicated to the first SSD controller and the second SSD controller respectively;

detect a first hardware interconnect between the first SSD controller and the second SSD controller;

establish a first communication connection between the first SSD controller and the second SSD controller through the first hardware interconnect;

allow the second SSD controller to manage a flash controller of the first SSD controller through the hardware interconnect for tasks that include a second deduplication task and a second low level redundant array of independent disks (RAID) task;

detect a third SSD controller;

detect a second hardware interconnect between the second SSD controller and the third SSD controller;

establish a second communication connection between the second SSD controller and the third SSD controller through the second hardware interconnect;

provide an addressing scheme to support a two level mapping and an intersystem communication mapping through the respective established communication connection between the first SSD controller, the second SSD controller, and the third SSD controller;

implement cross-SSD computing to switch communication of the first flash memory from the first SSD controller to the second SSD controller while maintaining the established first communication connection between the first SSD controller and the second SSD controller; and

implement one or more functions associated with the first SSD controller, the second SSD controller, and the third SSD controller through the respective hardware interconnects such that the first SSD controller, the second SSD controller, and the third SSD controller perform the one or more functions interchangeably and are configured to communicate with each other to distribute the performance of the one or more functions, wherein the one or more functions include at least one from a set of;

a cross processor replication, a RAID, and a read and write (RW) management.

11. The non-transitory computer-readable storage medium according to claim 10, wherein a multi-controller architecture is implemented to provide a multi-system addressing scheme to allow the first SSD controller to manage a flash controller of the second SSD controller for tasks that include at least one from a set of:

a first deduplication task and a first low level RAID task.