Hybrid main memory using a fine-grain level of remapping
First Claim
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1. A hybrid memory system comprising:
- a hybrid memory that includes a first portion; and
a hardware memory controller coupled with the hybrid memory, wherein the hardware memory controller is to;
access the hybrid memory with a first physical address, using a translation line, wherein the translation line is associated with a mapping of the first physical address to a first line in the first portion that is within a memory page, wherein the mapping provides an indication that the first line is not immediately accessible in the first portion, and the indication defines a reserved address in the first portion or a translation line tag.
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Abstract
Accessing a hybrid memory using a translation line is disclosed. The hybrid memory comprises a first portion. The translation line maps a first physical memory address to a first line in the first portion. Said mapping provides an indication that the first line is not immediately accessible in the first portion.
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Citations
27 Claims
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1. A hybrid memory system comprising:
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a hybrid memory that includes a first portion; and a hardware memory controller coupled with the hybrid memory, wherein the hardware memory controller is to; access the hybrid memory with a first physical address, using a translation line, wherein the translation line is associated with a mapping of the first physical address to a first line in the first portion that is within a memory page, wherein the mapping provides an indication that the first line is not immediately accessible in the first portion, and the indication defines a reserved address in the first portion or a translation line tag. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A method, comprising:
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accessing a hybrid memory with a first physical memory address using a translation line, wherein the hybrid memory includes a first portion, the translation line is associated with a mapping of the first physical memory address to a first line in the first portion that is within a memory page, the mapping provides an indication that the first line is not immediately accessible in the first portion, and the indication defines a reserved address in the first portion or a translation line tag.
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19. A method of supporting a hybrid main memory in hardware, comprising:
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using a memory controller to remap at least in part by translating a plurality of physical memory addresses respectively associated with a plurality of current content locations; associating the memory controller with the hybrid main memory, wherein the hybrid main memory includes a primary memory technology area and an alternative memory technology area; associating the memory controller with a processor; and on read of a physical address associated with an alternative data line that is currently stored in the alternative memory technology area, transferring the alternative data line to the processor and updating a mapping state to associate the physical address associated with the alternative data line with the primary memory technology area, wherein the alternative data line is a portion of a memory page. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27)
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Specification