Semiconductor package having multi-phase power inverter with internal temperature sensor

• US 9,899,302 B2
• Filed: 05/17/2017
• Issued: 02/20/2018
• Est. Priority Date: 12/13/2010
• Status: Active Grant

• Current Assignee: Infineon Technologies Americas Corp. (Infineon Technologies AG)
• Original Assignee: Infineon Technologies Americas Corp. (Infineon Technologies AG)
• Inventors: Fernando, Dean, Barbosa, Roel, Takahashi, Toshio
• Primary Examiner(s): Gumedzoe, Peniel M
• Application Number:
  US15/597,359
• Publication Number:
  US 20170250127A1
• Time in Patent Office: 279 Days
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/29101 the principal constituent melting at a temperature of less than 400°C
• CPC Class Codes: H01L 2224/2929 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/29339 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/45147 Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/4903 Connectors having different sizes, e.g. different diameters
• CPC Class Codes: H01L 2224/4911 the connectors being bonded to at least one common bonding area, e.g. daisy chain
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/3107 the device being completely enclosed
• CPC Class Codes: H01L 23/34 Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements thermal treatment apparatus H01L21/00
• CPC Class Codes: H01L 23/49513 having bonding material between chip and die pad
• CPC Class Codes: H01L 23/4952 the additional leads being a bump or a wire
• CPC Class Codes: H01L 23/49541 Geometry of the lead-frame
• CPC Class Codes: H01L 23/49548 : Cross section geometry H01L23/49562 takes precedence
• CPC Class Codes: H01L 23/49562 : for devices being provided for in H01L29/00
• CPC Class Codes: H01L 23/49575 : Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 25/16 : the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13064 : High Electron Mobility Transistor [HEMT, HFET [heterostructure FET], MODFET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/20753 : larger or equal to 30 microns less than 40 microns
• CPC Class Codes: H01L 2924/20755 : larger or equal to 50 microns less than 60 microns
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/30111 : matching
• CPC Class Codes: H01L 2924/3512 : Cracking

Abstract

According to an exemplary implementation, a semiconductor package includes a multi-phase power inverter having power switches and situated on a leadframe of the semiconductor package. The semiconductor package further includes a temperature sensor situated on the leadframe, where the temperature sensor is configured to generate a sensed temperature of the power switches. The semiconductor package also includes a driver circuit configured to drive the power switches of the multi-phase power inverter responsive to the sensed temperature. The temperature sensor can be on a common IC with the driver circuit. Furthermore, the semiconductor package can include an over-temperature protection circuit configured to provide over-temperature protection to the multi-phase power inverter using the sensed temperature.

Claims

1. A semiconductor package comprising:

a leadframe, wherein the leadframe comprises a thermally conductive material and a phase output strip extending from a first edge of the leadframe to a second edge of the leadframe opposite the first edge;

a multi-phase power inverter including power switches, wherein the multi-phase power inverter is situated on the leadframe of the semiconductor package;

a common integrated circuit (IC), comprising a power stage ground and a logic ground, wherein;

the common IC is separate from the multi-phase power inverter and situated on the leadframe, and

the logic ground is connected to the power stage ground;

a temperature sensor situated on the common IC, the temperature sensor configured to generate a sensed temperature of the power switches;

an over-temperature protection circuit situated on the common IC, the over-temperature protection circuit configured to use the sensed temperature to provide over-temperature protection to the multi-phase power inverter using a plurality of temperature threshold values.

2. The semiconductor package of claim 1, wherein the semiconductor package is configured as an open source semiconductor package.

3. The semiconductor package of claim 1, further comprising driver circuit situated on the common IC, wherein the driver circuit is configured to drive the power switches by a respective driver impedance matched to the respective power switch driven by the respective driver.

4. The semiconductor package of claim 3, wherein the driver circuit is configured to drive the power switches of the multi-phase power inverter responsive to the sensed temperature.

5. The semiconductor package of claim 1, further comprising a supply voltage input, and the common IC further comprises an undervoltage circuit, wherein the undervoltage circuit is configured to disable switching of multi-phase power inverter in response to an undervoltage condition at the supply voltage input.

6. The semiconductor package of claim 5, further comprising an integrated bootstrap function, wherein a respective bootstrap supply voltage couples to a respective power switch of the multi-phase power inverter through a bootstrap capacitor.

7. The semiconductor package of claim 1, wherein the semiconductor package is configured to operate with two-phase modulation.

8. The semiconductor package of claim 1 wherein the common IC comprises input/output terminals configured to receive one or more logic signals for one or more power switches.

9. The semiconductor package of claim 1, wherein the leadframe is a power quad flat no-lead (PQFN) leadframe.

10. A semiconductor package comprising:

a leadframe, wherein the leadframe comprises a thermally conductive material and a phase output strip extending from a first edge of the leadframe to a second edge of the leadframe opposite the first edge;

a multi-phase power inverter including power switches and situated on the leadframe of the semiconductor package;

a common integrated circuit (IC) comprising;

a power stage ground;

a logic ground; and

a temperature sensor that is configured to generate a sensed temperature of the power switches, wherein;

the logic ground is connected to the power stage ground, and

the common IC is separate from the multi-phase power inverter and situated on the leadframe; and

an over-temperature protection circuit situated on the common IC, the over-temperature protection circuit configured to use the sensed temperature to provide over-temperature protection to the multi-phase power inverter using a plurality of temperature threshold values.

11. The semiconductor package of claim 10, wherein the semiconductor package is configured as an open source semiconductor package.

12. The semiconductor package of claim 10, wherein the semiconductor package is configured to operate with two-phase modulation.

13. The semiconductor package of claim 10, further comprising a supply voltage input, and the common IC further comprises an undervoltage circuit, wherein the undervoltage circuit is configured to disable switching of multi-phase power inverter in response to an undervoltage condition at the supply voltage input.

14. The semiconductor package of claim 10, wherein the common IC is configured to drive the power switches of the multi-phase power inverter responsive to the sensed temperature.

15. The semiconductor package of claim 10, further comprising driver circuit situated on the common IC, wherein the driver circuit is configured to drive the power switches by a respective driver impedance matched to the respective power switch driven by the respective driver.

16. The semiconductor package of claim 10, further comprising an integrated bootstrap function, wherein a respective bootstrap supply voltage couples to a respective power switch of the multi-phase power inverter through a bootstrap capacitor.

17. The semiconductor package of claim 10, wherein the leadframe is a power quad flat no-lead (PQFN) leadframe.

18. The semiconductor package of claim 10, wherein the common IC comprises input/output terminals configured to receive one or more logic signals for one or more power switches.

19. The semiconductor package of claim 10, wherein the temperature sensor is within approximately 3 millimeters of each of the power switches.

20. The semiconductor package of claim 10, wherein the common IC is further configured to control switching of the multi-phase power inverter.