Off-chip vias in stacked chips

• US 9,899,353 B2
• Filed: 05/29/2015
• Issued: 02/20/2018
• Est. Priority Date: 10/10/2006
• Status: Active Grant

• Current Assignee: Tessera, Inc. (Adeia Inc.)
• Original Assignee: Tessera, Inc. (Adeia Inc.)
• Inventors: Haba, Belgacem, Mohammed, Ilyas, Oganesian, Vage, Ovrutsky, David, Mirkarimi, Laura Wills
• Primary Examiner(s): Smith, Zandra
• Assistant Examiner(s): BOYLE, ABBIGALE A
• Application Number:
  US14/725,975
• Publication Number:
  US 20150333042A1
• Time in Patent Office: 998 Days
• Field of Search: None
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 2221/68377 with parts of the auxiliary support remaining in the finished device
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/24145 the bodies being stacked
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48145 the bodies being stacked
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
• CPC Class Codes: H01L 2224/9202 Forming additional connectors after the connecting process
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2225/06506 Wire or wire-like electrical connections between devices
• CPC Class Codes: H01L 2225/0651 Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06517 Bump or bump-like direct electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06524 Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
• CPC Class Codes: H01L 2225/06541 Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV] manufacturing via connections per se H01L21/76898
• CPC Class Codes: H01L 2225/06551 Conductive connections on the side of the device
• CPC Class Codes: H01L 2225/06568 : the devices decreasing in size, e.g. pyramidical stack
• CPC Class Codes: H01L 2225/06582 : Housing for the assembly, e.g. chip scale package [CSP]
• CPC Class Codes: H01L 23/5382 : Adaptable interconnections, e.g. for engineering changes
• CPC Class Codes: H01L 24/24 : of an individual high density interconnect connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/82 : by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 24/96 : the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/207 : Diameter ranges

Abstract

A microelectronic assembly includes first and second stacked microelectronic elements, each having spaced apart traces extending along a front face and beyond at least a first edge thereof. An insulating region can contact the edges of each microelectronic element and at least portions of the traces of each microelectronic element extending beyond the respective first edges. The insulating region can define first and second side surfaces adjacent the first and second edges of the microelectronic elements. A plurality of spaced apart openings can extend along a side surface of the microelectronic assembly. Electrical conductors connected with respective traces can have portions disposed in respective openings and extending along the respective openings. The electrical conductors may extend to pads or solder balls overlying a face of one of the microelectronic elements.

Claims

1. A microelectronic assembly, comprising:

a first end, a second end, and an edge extending between the first and second ends;

a first microelectronic element and a second microelectronic element overlying the first microelectronic element,

each of the first and second microelectronic elements having a front face, a rear face remote from the front face, a plurality of contacts at the front face, a first edge extending between the front and rear faces, and a plurality of electrically conductive elements coupled with the contacts and extending along the front face and beyond the first edge, the plurality of electrically conductive elements including a first electrically conductive element extending from a contact of the first microelectronic element, and a second electrically conductive element extending from a contact of the second microelectronic element, wherein the front face of the second microelectronic element overlies the rear faces of the first microelectronic element;

an adhesive layer disposed at the rear face of the first microelectronic element and the rear face of the first microelectronic element;

first and second dielectric layers respectively overlying and contacting the first edges of the respective first and second microelectronic elements;

each of the first and second dielectric layers further including a first surface coplanar with the rear face of the respective first and second microelectronic elements, an opposed second surface contacting the respective first and second electrically conductive elements, and opposed edge surfaces extending between the first and second surfaces, the adhesive layer and the first electrically conductive element bounding the first dielectric layer so that the first dielectric layer only extends along the first edge of the first microelectronic element; and

a plurality of electrical conductors insulated from the first edges of the first and second microelectronic elements by the respective first and second dielectric layers, the plurality of the electrical conductors extending along the edge surfaces of the first and second dielectric layers, at least some of the plurality of electrical conductors extending along an entirety of the edge of the microelectronic assembly, and at least one other of the plurality of electrical conductors coupled with the first microelectronic element through the first electrically conductive element and not coupled with the electrically conductive elements of the second microelectronic element.

2. The microelectronic assembly as claimed in claim 1, further comprising an interconnection element and electrical connections extending between the plurality of electrical conductors and the interconnection element.

3. The microelectronic assembly as claimed in claim 1, further comprising an insulative layer overlying the rear face of at least one of the first and second microelectronic elements.

4. The microelectronic assembly as claimed in claim 1, wherein the first edges of the first and second microelectronic elements are substantially aligned with one another.

5. The microelectronic assembly as claimed in claim 1, wherein each of the first and second microelectronic elements comprises a flash memory.

6. The microelectronic assembly as claimed in claim 1, wherein the edge of the assembly is defined by the edge surfaces of the first and second dielectric layers which overlie the first edges of the first and second microelectronic elements.

7. The microelectronic assembly as claimed in claim 6, wherein the adhesive layer attaches the first and second dielectric layers together.

8. The microelectronic assembly as claimed in claim 1, wherein at least some of the plurality of electrical conductors contact selected ones of the plurality of conductive elements.

9. A microelectronic assembly, comprising:

a first end, a second end, and an edge extending between the first and second ends;

a plurality of microelectronic elements stacked with one another, each microelectronic element having a contact-bearing front face, a rear face remote from the front face, and a first edge extending between the front and rear faces, the front or rear face of each microelectronic element facing towards the front or rear face of another one of the microelectronic elements stacked therewith,

the plurality of microelectronic elements including first and second microelectronic elements each having a plurality of electrically conductive elements extending from contacts of such microelectronic element and extending along the front face of such microelectronic element and beyond the first edge thereof, the plurality of electrically conductive elements including a first electrically conductive element coupled with a contact of the first microelectronic element, and a second electrically conductive element coupled with a contact of the second microelectronic element;

a plurality of adhesive layers disposed at the front and rear face of each of the plurality of microelectronic elements;

a plurality of dielectric layers respectively extending from and contacting the first edges of the plurality of microelectronic elements, each of the plurality of dielectric layers further including a first surface coplanar with the respective rear faces of the plurality of microelectronic elements, an opposed second surface, and an edge surface extending between the first and second surfaces and along the first edges of the plurality of microelectronic elements,

wherein first and second dielectric layers of the plurality of the dielectric layers respectively contact the plurality of the electrically conductive elements of the respective first and second microelectronic elements,

wherein a first adhesive layer of the plurality of adhesive layers and the first electrically conductive element bound the first dielectric layer so that the first dielectric layer only extends along the first edge of the first microelectronic element; and

a plurality of electrical conductors insulated from the first edges by a portion of the plurality of the dielectric layers and extending along an entirety of the edge of the microelectronic assembly, at least one of the plurality of electrical conductors coupled with the first microelectronic element through the first electrically conductive element and not coupled with second electrically conductive elements of the second microelectronic element.

10. The microelectronic assembly as claimed in claim 9, further comprising an interconnection element having terminals at a surface thereof for connection with contacts of a circuit panel, wherein the first electrical conductor is electrically coupled with the interconnection element.

11. A microelectronic assembly as claimed in claim 9, further comprising an insulative layer overlying the rear face of at least one of the plurality of microelectronic elements.

12. The microelectronic assembly as claimed in claim 9, wherein the first edges of the plurality of microelectronic elements are substantially aligned with one another.

13. The microelectronic assembly as claimed in claim 9, wherein each of the microelectronic elements comprises a flash memory.

14. The microelectronic assembly as claimed in claim 9, further comprising at least one electrical conductor of the plurality of electrical conductors insulated from the first edges of the plurality of microelectronic elements by the plurality of dielectric layers, the at least one electrical conductor of the plurality of electrically conductors coupled with third and fourth microelectronic elements within the assembly through electrically conductive elements of the third and fourth microelectronic elements coupled therewith.

15. The microelectronic assembly as claimed in claim 9, wherein the individual dielectric layers contacting the respective microelectronic elements are attached together in the assembly such that the edge surface of the assembly is defined by the edge surfaces of the individual dielectric layers.

16. The microelectronic assembly as claimed in claim 15, wherein the adhesive layers attach individual dielectric layers with one another.

17. The microelectronic assembly as claimed in claim 9, wherein at least some of the plurality of electrical conductors contact selected ones of the electrically conductive elements.