Multiple functional equivalence digital communications interface

• US 9,900,204 B2
• Filed: 02/22/2013
• Issued: 02/20/2018
• Est. Priority Date: 04/20/2010
• Status: Active Grant

• Current Assignee: Qorvo US, Inc. (Qorvo, Inc.)
• Original Assignee: Qorvo US, Inc. (Qorvo, Inc.)
• Inventors: Levesque, Chris, Ngo, Christopher Truong
• Primary Examiner(s): Huang, David S
• Application Number:
  US13/773,888
• Publication Number:
  US 20130177106A1
• Time in Patent Office: 1,824 Days
• Field of Search: 375295, 375296, 375297, 375316
• CPC Class Codes: H03F 1/0227 using supply converters
• CPC Class Codes: H03F 1/0261 with control of the polarisation voltage or current, e.g. gliding Class A
• CPC Class Codes: H03F 1/0277 Selecting one or more amplifiers from a plurality of amplifiers
• CPC Class Codes: H03F 2200/171 A filter circuit coupled to the output of an amplifier
• CPC Class Codes: H03F 2200/222 A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier
• CPC Class Codes: H03F 2200/27 A biasing circuit node being switched in an amplifier circuit
• CPC Class Codes: H03F 2200/318 A matching circuit being used as coupling element between two amplifying stages
• CPC Class Codes: H03F 2200/336 A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
• CPC Class Codes: H03F 2200/387 A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
• CPC Class Codes: H03F 2200/411 the output amplifying stage of an amplifier comprising two power stages
• CPC Class Codes: H03F 2200/414 A switch being coupled in the output circuit of an amplifier to switch the output on/off
• CPC Class Codes: H03F 2200/417 A switch coupled in the output circuit of an amplifier being controlled by a circuit
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/504 the supply voltage or current being continuously controlled by a controlling signal, e.g. the controlling signal of a transistor implemented as variable resistor in a supply path for, an IC-block showed amplifier
• CPC Class Codes: H03F 2200/534 Transformer coupled at the input of an amplifier
• CPC Class Codes: H03F 2200/537 A transformer being used as coupling element between two amplifying stages
• CPC Class Codes: H03F 2200/541 Transformer coupled at the output of an amplifier
• CPC Class Codes: H03F 2203/21106 An input signal being distributed in parallel over the inputs of a plurality of power amplifiers
• CPC Class Codes: H03F 2203/21142 Output signals of a plurality of power amplifiers are parallel combined to a common output
• CPC Class Codes: H03F 2203/21157 A filter circuit being added at the output of a power amplifier stage
• CPC Class Codes: H03F 3/195 : in integrated circuits
• CPC Class Codes: H03F 3/211 : using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/245 : with semiconductor devices only
• CPC Class Codes: H03F 3/602 : Combinations of several amplifiers
• CPC Class Codes: H03F 3/72 : Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
• CPC Class Codes: H04L 27/367 : using predistortion

Abstract

A multiple functional equivalence digital communications interface and a group of functional circuits are disclosed. The multiple functional equivalence digital communications interface presents a functional equivalence of each of a group of digital communications interfaces to a digital communications bus. Each functional equivalence of the group of digital communications interfaces is associated with a corresponding one of the group of functional circuits.

Claims

1. A radio frequency (RF) communications system comprising:

transceiver circuitry configured to provide an RF input signal to an RF power amplifier (PA); and

a module coupled to the transceiver circuitry via a digital communications bus, wherein the module comprises;

a multiple functional equivalence digital communications interface (DCI) comprising;

start-of-sequence (SOS) detection circuitry configured to detect an SOS of a received sequence from the digital communications bus and provide an SOS detection signal to indicate detection of the SOS; and

sequence processing circuitry configured to initiate processing of the received sequence based on the SOS detection signal, wherein the multiple functional equivalence DCI is configured to present a first functional equivalence of a PA-DCI to the digital communications bus, present a second functional equivalence of a direct current (DC)-DC converter DCI to the digital communications bus, and present a third functional equivalence of an aggregation circuitry DCI to the digital communications bus;

RF PA circuitry comprising the RF PA, such that the RF PA circuitry is configured to be controlled via the first functional equivalence of the PA-DCI;

a DC-DC converter configured to be controlled via the second functional equivalence of the DC-DC converter DCI; and

front-end aggregation circuitry configured to be controlled via the third functional equivalence of the aggregation circuitry DCI.

2. The RF communications system of claim 1 wherein the DC-DC converter is configured to receive an envelope control signal via the multiple functional equivalence DCI.

3. The RF communications system of claim 2 wherein the DC-DC converter is configured to provide an envelope power supply signal based on the envelope control signal, and the RF PA is configured to use the envelope power supply signal to provide power for amplification.

4. The RF communications system of claim 1 wherein the RF PA circuitry is configured to receive a PA configuration control signal via the multiple functional equivalence DCI.

5. The RF communications system of claim 4 wherein the RF PA circuitry comprises an RF switch, such that a configuration of the RF switch is based on the PA configuration control signal.

6. The RF communications system of claim 1 wherein control circuitry is coupled to a plurality of functional circuits via a control circuitry DCI and the multiple functional equivalence DCI using the digital communications bus.

7. The RF communications system of claim 1 wherein the multiple functional equivalence DCI is further configured to function as a serial communications interface.

8. The RF communications system of claim 1 wherein the multiple functional equivalence DCI is further configured to function as a serial digital interface.

9. The RF communications system of claim 1 wherein the multiple functional equivalence DCI is further configured to function as a slave device.

10. The RF communications system of claim 1 wherein the multiple functional equivalence DCI is further configured to function as a radio frequency front-end (RFFE) interface.

11. The RF communications system of claim 1 wherein the multiple functional equivalence DCI is further configured to function as a mobile industry processor interface (MIPI).

12. The RF communications system of claim 1 wherein the digital communications bus is configured to function as a bi-directional bus.

13. The RF communications system of claim 1 wherein the digital communications bus is configured to function as a uni-directional bus.

14. The RF communications system of claim 1 wherein the digital communications bus is configured to function as a 2-wire serial communications bus.

15. The RF communications system of claim 1 wherein the digital communications bus is configured to function as a 3-wire serial communications bus.

16. The RF communications system of claim 1 wherein the first functional equivalence comprises responsiveness to a first slave identification number, the second functional equivalence comprises responsiveness to a second slave identification number, and the third functional equivalence comprises responsiveness to a third slave identification number.

17. The RF communications system of claim 1 wherein the front-end aggregation circuitry is configured to receive an aggregation control signal via the multiple functional equivalence DCI.

18. The RF communications system of claim 17 wherein the front-end aggregation circuitry is configured to route RF signals as directed by the aggregation control signal.