Method for manufacturing semiconductor device

• US 9,905,703 B2
• Filed: 05/10/2016
• Issued: 02/27/2018
• Est. Priority Date: 12/03/2012
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei
• Primary Examiner(s): Roman, Angel
• Application Number:
  US15/150,509
• Publication Number:
  US 20160254387A1
• Time in Patent Office: 658 Days
• Field of Search: None
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02658 Pretreatments cleaning in general H01L21/02041
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

To improve electric characteristics of a semiconductor device including an oxide semiconductor. Alternatively, to improve reliability of a semiconductor device including an oxide semiconductor. In a transistor including a first oxide film, an oxide semiconductor film, a pair of electrodes in contact with the oxide semiconductor film, and a second oxide film in contact with the oxide semiconductor film and the pair of electrodes, oxygen is added to the first oxide film and the second oxide film in contact with the oxide semiconductor film and the pair of electrodes, so that oxygen vacancies are reduced. The oxygen is diffused to the oxide semiconductor film by heat treatment or the like; thus, oxygen vacancies in the oxide semiconductor film are reduced.

Claims

1. A semiconductor device comprising:

an oxide semiconductor layer;

a source electrode over the oxide semiconductor layer;

a drain electrode over the oxide semiconductor layer;

an oxide layer over the source electrode and the drain electrode, wherein the oxide layer is in contact with a portion of the oxide semiconductor layer, the portion being between the source electrode and the drain electrode;

a gate insulating layer over the oxide layer; and

a gate electrode over the gate insulating layer,

wherein the oxide semiconductor layer includes a first n-type region below the source electrode and a second n-type region below the drain electrode,

wherein an upper surface of the oxide semiconductor layer between the source electrode and the drain electrode is etched, and

wherein the oxide layer is in contact with the first n-type region and the second n-type region.

2. The semiconductor device according to claim 1, wherein a metal element of the source electrode and the drain electrode is contained in the first n-type region and the second n-type region.

3. The semiconductor device according to claim 1, wherein each of the source electrode and the drain electrode has a tapered shape.

4. The semiconductor device according to claim 1, wherein an end portion of the oxide layer and an end portion of the gate insulating layer are coplanar.

5. The semiconductor device according to claim 1,

wherein the first n-type region comprises a first region and a second region, and

wherein a thickness of the first region is smaller than a thickness of the second region.

6. The semiconductor device according to claim 1, wherein the gate electrode has a multi-layered structure.

7. A semiconductor device comprising:

an oxide semiconductor layer;

a source electrode over the oxide semiconductor layer;

a drain electrode over the oxide semiconductor layer;

an oxide layer over the source electrode and the drain electrode, wherein the oxide layer is in contact with a portion of the oxide semiconductor layer, the portion being between the source electrode and the drain electrode;

a gate insulating layer over the oxide layer; and

a gate electrode over the gate insulating layer,

wherein the oxide semiconductor layer includes a first n-type region below the source electrode and a second n-type region below the drain electrode,

wherein an upper surface of the oxide semiconductor layer between the source electrode and the drain electrode is etched,

wherein the oxide layer is in contact with the first n-type region and the second n-type region,

wherein each of the source electrode and the drain electrode comprises a first conductive layer and a second conductive layer,

wherein the second conductive layer is provided on the first conductive layer, and

wherein the second conductive layer extends beyond an inner side edge of the first conductive layer.

8. The semiconductor device according to claim 7, wherein an end portion of the oxide layer and an end portion of the gate insulating layer are coplanar.

9. The semiconductor device according to claim 7,

wherein the first n-type region comprises a first region and a second region, and

wherein a thickness of the first region is smaller than a thickness of the second region.

10. The semiconductor device according to claim 7, wherein the gate electrode has a multi-layered structure.

11. A semiconductor device comprising:

an oxide semiconductor layer;

a source electrode over the oxide semiconductor layer;

a drain electrode over the oxide semiconductor layer;

an oxide layer over the source electrode and the drain electrode, wherein the oxide layer is in contact with a portion of the oxide semiconductor layer, the portion being between the source electrode and the drain electrode;

a gate insulating layer over the oxide layer; and

a gate electrode over the gate insulating layer,

wherein the oxide semiconductor layer includes a first n-type region below the source electrode and a second n-type region below the drain electrode,

wherein an upper surface of the oxide semiconductor layer between the source electrode and the drain electrode is etched,

wherein the oxide layer is in contact with the first n-type region and the second n-type region, and

wherein each of the source electrode and the drain electrode comprises a metal nitride layer in contact with the oxide semiconductor layer.

12. The semiconductor device according to claim 11, wherein a metal element of the source electrode and the drain electrode is contained in the first n-type region and the second n-type region.

13. The semiconductor device according to claim 11, wherein each of the source electrode and the drain electrode has a tapered shape.

14. The semiconductor device according to claim 11, wherein an end portion of the oxide layer and an end portion of the gate insulating layer are coplanar.

15. The semiconductor device according to claim 11,

wherein the first n-type region comprises a first region and a second region, and

wherein a thickness of the first region is smaller than a thickness of the second region.

16. The semiconductor device according to claim 11, wherein the gate electrode has a multi-layered structure.