Superconducting multi-bit digital mixer
First Claim
1. A multibit digital mixer constructed employing pulse logic, comprising:
- a first pulse input port configured to receive at least one first digital input signal pulse;
a second pulse input port configured to receive at least one second digital input signal pulse;
at least one of the first and second digital input signal pulses comprising a plurality of pulses;
a multiplier circuit configured to generate a multiplication product of the at least one first digital input signal pulse and the at least one second digital input signal pulse, as a multibit set of digital output signal pulses; and
a pulse output port configured to transmit the multibit set of digital output signal pulses.
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Accused Products
Abstract
A superconducting multi-bit digital mixer, designed using rapid single flux quantum (RSFQ) logic, for multiplying two independent digital streams, at least one of these comprising a plurality of parallel bit lines, wherein the output is also a similar plurality of bit lines. In a preferred embodiment, one of the digital streams represents a local oscillator signal, and the other digital stream digital radio frequency input from an analog-to-digital converter. The multi-bit mixer comprises an array of bit-slices, with the local oscillator signal generated using shift registers. This multi-bit mixer is suitable for an integrated circuit with application to a broadband digital radio frequency receiver, a digital correlation receiver, or a digital radio frequency transmitter. A synchronous pulse distribution network is used to ensure proper operation at data rates of 20 GHz or above.
429 Citations
20 Claims
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1. A multibit digital mixer constructed employing pulse logic, comprising:
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a first pulse input port configured to receive at least one first digital input signal pulse; a second pulse input port configured to receive at least one second digital input signal pulse; at least one of the first and second digital input signal pulses comprising a plurality of pulses; a multiplier circuit configured to generate a multiplication product of the at least one first digital input signal pulse and the at least one second digital input signal pulse, as a multibit set of digital output signal pulses; and a pulse output port configured to transmit the multibit set of digital output signal pulses. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A multibit digital mixing method, comprising:
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receiving at least one first digital input signal pulse; receiving at least one second digital input signal pulse; at least one of the first digital input signal pulse and the second digital input signal pulse comprising a plurality of pulses; generating a multiplication product of the at least one first digital input signal pulse and the at least one second digital input signal pulse, with a multibit multiplier circuit operating without a carry operation, the multiplication product being a multibit set of digital output signal pulses; and transmitting the multibit set of digital output signal pulses. - View Dependent Claims (16, 17)
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18. A multibit digital mixer, comprising:
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a first input port configured to receive a plurality of pulse logic first digital input signal pulses; a second input port configured to receive at least one pulse logic second digital input signal pulse; the a plurality of pulse logic first digital input signal pulses and the at least one pulse logic second digital input signal pulse being asynchronous; a synchronous pulse distribution network configured to synchronize timing of the plurality of pulse logic first digital input signal pulses with the at least one pulse logic second digital input signal pulse; a pulse logic multiplier circuit configured to generate a multiplication product of the synchronized plurality of pulse logic first digital input signal pulses and the at least one pulse logic second digital input signal pulse, as a pulse logic multibit digital output signal. - View Dependent Claims (19, 20)
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Specification