Method for auto-calibrating semiconductor component tester

• US 9,910,091 B2
• Filed: 02/08/2016
• Issued: 03/06/2018
• Est. Priority Date: 02/13/2015
• Status: Active Grant

• Current Assignee: Heng-Chun Ho
• Original Assignee: Heng-Chun Ho
• Inventors: Ho, Heng-Chun
• Primary Examiner(s): Nguyen, Vinh
• Application Number:
  US15/018,198
• Publication Number:
  US 20160238686A1
• Time in Patent Office: 757 Days
• CPC Class Codes: G01R 31/00 Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere measuring superconductive properties G01R33/1238; testing or measuring semiconductors or solid state devices during manufacture H01L22/00; testing line transmission systems H04B3/46
• CPC Class Codes: G01R 31/3191 Calibration

Abstract

A method for auto-calibrating a semiconductor component tester is provided. The semiconductor component tester includes a wafer tester or a package IC tester. Firstly, an initial tester setting value and an initial board setting value are acquired through a calibration board. Then, the test record of the semiconductor component corresponding to each test time and the tester parameter and the board parameter for testing the semiconductor component are recoded. If the semiconductor component fails the test, the semiconductor component is tested again according to the previously-passed tester parameter and the previously-passed board parameter, or the semiconductor component is tested again after the tester parameter and the board parameter are adjusted. The method is capable of correcting the improper test result from the improper tester parameter.

Claims

1. A method for auto-calibrating a semiconductor component tester, the tester being used for testing at least one semiconductor component with at least one device under test, the tester comprising at least one board slot for receiving a channel board therein, each channel board comprising at least one test channel, the method comprising steps of:

(A) detecting a calibration board in the board slot by a computer to acquire an initial tester setting value of the tester and an initial board setting value of the channel board, and recording the initial tester setting value of the tester and the initial board setting value of the channel board; and

(B) testing the semiconductor component by the computer to acquire a test record of the tested semiconductor component, a test timing/frequency of the tested semiconductor component and a tester parameter of the tester and a board parameter of the channel board for the tested semiconductor component, wherein if the semiconductor component fails the test, the semiconductor component is tested again according to the tester parameter and the board parameter corresponding to a previously-passed semiconductor component.

2. The method according to claim 1, wherein if the semiconductor component fails the test according to the tester parameter and the board parameter corresponding to the previously-passed semiconductor component and becomes a not-passed semiconductor component, the method further comprises steps of:

(C) automatically generating a compensating value according to a difference between the initial tester setting value and the tester parameter corresponding to the not-passed semiconductor component and a difference between the initial board setting value and the board parameter corresponding to the not-passed semiconductor component; and

(D) generating a calibrated tester parameter and a calibrated board parameter according to the compensating value, and testing the not-passed semiconductor component according to the calibrated tester parameter and/or the calibrated board parameter.

3. The method according to claim 2, wherein the steps (A), (B), (C) and (D) are performed by executing a system program, wherein the system program further provides a user interface, and at least one compensating value modification block is shown on the user interface, wherein when the compensating value modification block is selected, the system program automatically generates the calibrated tester parameter and/or the calibrated board parameter.

4. The method according to claim 1, wherein the test record is stored in a cloud storage device.

5. The method according to claim 1, wherein the channel board is a device power supplies board or a high speed digital board.

6. The method according to claim 1, wherein the semiconductor component tester includes a wafer tester or a package IC tester.

7. The method according to claim 1, wherein the semiconductor component to be tested includes at least one wafer, at least one die or at least one Package IC unit.