Semiconductive device and associated method of manufacture

• US 9,911,816 B2
• Filed: 04/22/2015
• Issued: 03/06/2018
• Est. Priority Date: 05/14/2014
• Status: Active Grant

• Current Assignee: Nexperia B.V. (Wingtech Technology Co., Ltd.)
• Original Assignee: Nexperia B.V. (Wingtech Technology Co., Ltd.)
• Inventors: Boettcher, Tim, Behtash, Reza, Igel-Holtzendorff, Thomas, Zhu, Linpei
• Primary Examiner(s): Swanson, Walter H
• Application Number:
  US14/693,756
• Publication Number:
  US 20150333133A1
• Time in Patent Office: 1,049 Days
• Field of Search: 257488, 438454, 1563451
• CPC Class Codes: H01L 21/67069 for drying etching
• CPC Class Codes: H01L 29/063 Reduced surface field [RESURF] pn-junction structures
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/404 Multiple field plate structures
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/66143 Schottky diodes
• CPC Class Codes: H01L 29/8725 of the trench MOS barrier type [TMBS]

Abstract

A semiconductive device comprising a body having: a first surface and an opposing second surface; a first semiconductive layer adjacent to the first surface; an active region comprising: a plurality of active trenches in the first surface, extending from the first surface into the first semiconductive layer, and having an active trench width, and a plurality of active cells; and a termination region at a periphery of the first surface comprising: at least one termination trench extending from the first surface into the first semiconductive layer, wherein the termination region has a width that is greater than the active trench width; and a number of termination trench separators having a width that is less than a width of the active cells, wherein the active trenches and the at least one termination trench each comprise a first insulator layer adjacent to the first semiconductive layer of the body.

Claims

1. A semiconductive device comprising a body having:

a first surface and an opposing second surface;

a first semiconductive layer adjacent to the first surface;

an active region comprising;

a plurality of active trenches in the first surface, each of the plurality of active trenches extending from the first surface into the first semiconductive layer and having an active trench width, and

a plurality of active cells, each active cell provided in the first semiconductive layer adjacent to a separate one of the plurality of active trenches, each of the active cells having an active cell width between an adjacent pair of the active trenches; and

a termination region at a periphery of the first surface comprising;

at least two termination trenches, each of the at least two termination trenches extending from the first surface into the first semiconductive layer and having a termination trench width, and

at least one termination trench separator separating the at least two termination trenches and having a width that is less than the active cell width and the termination trench width, wherein the termination region has a width that is greater than the active trench width,

wherein the active trenches and the at least two termination trenches each comprise a first insulator layer adjacent to the first semiconductive layer of the body, and wherein conductive material is disposed on the first insulator layer within each of the active trenches.

2. The semiconductive device of claim 1, wherein each of the at least two termination trenches has a width across the first surface that is greater than the active trench width.

3. The semiconductive device of claim 1, further comprising a first electrically conductive layer that extends over substantially all of the active region and the termination region.

4. The semiconductive device of claim 1, wherein the body comprises a second insulating layer disposed on material in the at least two termination trenches.

5. The semiconductive device of claim 4, further comprising a first electrically conductive layer on the first surface that connects the active cells between the active trenches and extends over the second insulating layer.

6. The semiconductive device of claim 1, wherein the conductive material comprises poly-silicon or a metal.

7. The semiconductive device of claim 1, wherein the at least two termination trenches are completely filled with conductive material within the first insulator layer.

8. The semiconductive device of claim 1, wherein the body has a second semiconductive layer adjacent to the second surface, the first semiconductive layer having a different conductivity to the second semiconductive layer.

9. The semiconductive device of claim 8, comprising a second electrically conductive layer disposed on the second surface.

10. The semiconductive device of claim 1, wherein the active trenches have a depth that extends from the first surface into the first semiconductive layer and terminate in the first semiconductive layer.

11. The semiconductive device of claim 10, wherein the depth of the active trenches is the same as a depth of the at least two termination trenches.

12. The semiconductive device of claim 1, wherein each of the at least two termination trenches has a width that is at 1.2 to 2 times greater than the active trench width.

13. The semiconductive device of claim 1 wherein the width of the trench separator is about one tenth the width of the terminal trench width.

14. A semiconductive apparatus comprising:

an active region of a semiconductive layer;

each of a plurality of active trenches configured and arranged in the active region and having an active trench width;

each of a plurality of active cells configured and arranged adjacent to one of the active trenches and having an active cell width; and

a termination region adjacent to the active region and having

a width that is greater than the active trench width,

a plurality of termination trenches extending into the semiconductive layer,

a plurality of termination trench separators separating each of the plurality of termination trenches, wherein each termination trench separator has a width that is less than the active cell width and the termination trench width, and

a trench surface density greater than a trench surface density of the active region.

15. The apparatus of claim 14, further comprising an insulator layer adjacent to the semiconductive layer and covering at least a portion of a surface area respectively associated with each of the plurality of termination trenches, and wherein the termination region has a passivation layer on a surface of the semiconductive apparatus opposite the semiconductive layer.

16. The apparatus of claim 14, wherein the termination region further includes a passivation layer having a plurality of insulation layer extensions configured and arranged to extend in a direction opposite the semiconductive layer, wherein each insulation layer extension is in contact with at least two termination trenches.

17. A semiconductive device comprising a body having:

a first surface and an opposing second surface;

a first semiconductive layer adjacent to the first surface;

an active region comprising;

a plurality of active trenches in the first surface, the plurality of active trenches extending from the first surface into the first semiconductive layer and having an active trench width, and

a plurality of active cells, each active cell provided in the first semiconductive layer adjacent to an active trench, each of the active cells having an active cell width between an adjacent pair of the plurality of active trenches; and

a termination region at a periphery of the first surface comprising;

at least two termination trenches, each of the at least two termination trenches extending from the first surface into the first semiconductive layer and having a termination trench width, and

at least one termination trench separator separating the at least two termination trenches and having a width that is less than the terminal trench width of each of the at least two termination trenches and the active cell width, wherein the termination region has a width that is greater than the active trench width, wherein the width of trench separator is at least one tenth the width of the terminal trench width,

wherein the active trenches and the at least two termination trenches each comprise a first insulator layer adjacent to the first semiconductive layer of the body, and wherein the first insulator layer has a conductive material disposed thereon in each of the active trenches.