Semiconductor device

• US 9,911,844 B2
• Filed: 05/16/2016
• Issued: 03/06/2018
• Est. Priority Date: 08/20/2012
• Status: Active Grant

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: Nakano, Yuki, Nakamura, Ryota, Sakairi, Hiroyuki
• Primary Examiner(s): GHYKA, ALEXANDER G
• Application Number:
  US15/155,885
• Publication Number:
  US 20160260830A1
• Time in Patent Office: 659 Days
• Field of Search: None
• CPC Class Codes: H01L 21/046 using ion implantation
• CPC Class Codes: H01L 29/063 Reduced surface field [RESURF] pn-junction structures
• CPC Class Codes: H01L 29/0649 Dielectric regions, e.g. SiO2 regions, air gaps
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/47 Schottky barrier electrodes H01L29/435 takes precedence
• CPC Class Codes: H01L 29/4916 the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/66068 the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
• CPC Class Codes: H01L 29/7805 in antiparallel, e.g. freewheel diode
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

The semiconductor device includes: a semiconductor layer in which a trench is formed having a side surface and a bottom surface; a second conductivity-type layer formed on the semiconductor layer on the side surface and the bottom surface of the trench; a first conductivity-type layer formed on the semiconductor layer so as to contact the second conductivity-type layer; a first electrode electrically connected to the first conductivity-type layer; a second electrode embedded in the trench and electrically connected to the second conductivity-type layer; and a barrier-forming layer which is arranged between the second electrode and the side surface of the trench and which, between said barrier-forming layer and the second conductivity-type layer, forms a potential barrier higher than the potential barrier between the second conductivity-type layer and the second electrode.

Claims

1. A semiconductor device comprising:

a semiconductor layer in which a trench having a side surface and a bottom surface is formed;

a second conductivity type layer formed in the semiconductor layer on the side surface and the bottom surface of the trench;

a first conductivity type layer formed in the semiconductor layer so as to be contiguous to the second conductivity type layer;

a first electrode electrically connected to the first conductivity type layer;

a second electrode that is embedded in the trench and that is electrically connected to the second conductivity type layer; and

a barrier-forming layer that is disposed between the side surface of the trench and the second electrode and that forms a potential barrier between the barrier-forming layer and the second conductivity type layer higher than a potential barrier between the second conductivity type layer and the second electrode.

2. The semiconductor device according to claim 1, wherein the barrier-forming layer is further disposed on an edge portion of the bottom surface of the trench.

3. The semiconductor device according to claim 1, wherein the barrier-forming layer includes a metal layer made of any one of tungsten (W), platinum (Pt), nickel (Ni), cobalt (Co), and molybdenum (Mo).

4. The semiconductor device according to claim 1, wherein the barrier-forming layer includes a first conductivity type polysilicon layer.

5. The semiconductor device according to claim 1, wherein the barrier-forming layer includes an insulating layer made of any one of non-doped polysilicon, silicon oxide (SiO₂), aluminum oxide (Al₂O₃), and aluminum oxynitride (AlON).

6. A semiconductor device comprising:

a semiconductor layer in which a taper trench having a side surface and a bottom surface is formed, the side surface being inclined with respect to the bottom surface at an obtuse angle;

a second conductivity type layer formed in the semiconductor layer on the side surface and the bottom surface of the taper trench, the second conductivity type layer becoming thicker in a lateral direction along a surface of the semiconductor layer from the side surface corresponding to an inclination of the side surface of the taper trench;

a first conductivity type layer formed in the semiconductor layer so as to be contiguous to the second conductivity type layer;

a first electrode electrically connected to the first conductivity type layer;

a second electrode that is embedded in the taper trench and that is electrically connected to the second conductivity type layer; and

a barrier-forming layer disposed between the side surface of the taper trench and the second electrode and forming a potential barrier between the barrier-forming layer and the second conductivity type layer higher than a potential barrier between the second conductivity type layer and the second electrode.

7. The semiconductor device according to claim 6, wherein the barrier-forming layer is further disposed on an edge portion of the bottom surface of the taper trench.

8. The semiconductor device according to claim 6, wherein the barrier-forming layer includes a metal layer made of any one of tungsten (W), platinum (Pt), nickel (Ni), cobalt (Co), and molybdenum (Mo).

9. The semiconductor device according to claim 6, wherein the barrier-forming layer includes a first conductivity type polysilicon layer.

10. The semiconductor device according to claim 6, wherein the barrier-forming layer includes an insulating layer made of any one of non-doped polysilicon, silicon oxide (SiO₂), aluminum oxide (Al₂O₃), and aluminum oxynitride (AlON).