Three dimensional integrated circuits
First Claim
Patent Images
1. A device comprising:
- a programmable layer including a programmable circuit comprising a plurality of input programming nodes operable to program the programmable circuit in response to respective logic values; and
a hard-wire layer including a wire pattern hard-wired to the plurality of input programming nodes to hard-wire the respective logic values and to configure the programmable circuit with a hard-wired predetermined logical and routing functionality.
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Abstract
A three-dimensional semiconductor device, comprising: a first module layer having a plurality of circuit blocks; and a second module layer positioned substantially above the first module layer, including a plurality of configuration circuits; and a third module layer positioned substantially above the second module layer, including a plurality of circuit blocks; wherein, the configuration circuits in the second module control a portion of the circuit blocks in the first and third module layers.
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Citations
20 Claims
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1. A device comprising:
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a programmable layer including a programmable circuit comprising a plurality of input programming nodes operable to program the programmable circuit in response to respective logic values; and a hard-wire layer including a wire pattern hard-wired to the plurality of input programming nodes to hard-wire the respective logic values and to configure the programmable circuit with a hard-wired predetermined logical and routing functionality. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method comprising:
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forming a programmable layer including a programmable circuit comprising a plurality of input programming nodes operable to program the programmable circuit in response to respective logic values; forming a hard-wire layer including a wire pattern; and hard-wiring the wire pattern to the plurality of input programming nodes to hard-wire the respective logic values and to configure the programmable circuit with a hard-wired predetermined logical and routing functionality. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A method comprising:
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forming a layer including programmable logic comprising a plurality of input programming nodes operable to program the programmable logic in response to respective logic values; and converting the programmable logic to hard-wired logic, wherein said converting includes; forming a hard-wire layer comprising a wire pattern; and hard-wiring the wire pattern to the plurality of input programming nodes to hard-wire the respective logic values and to configure the programmable logic with a hard-wired predetermined logical and routing functionality to form the hard-wired logic. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification