Performing a repair operation in arrays
First Claim
1. A computer program product for performing a repair operation in a computer system using arrays having array cells, the computer program product comprising:
- a tangible non-transitory storage medium readable by a processing circuit and storing instructions for execution by the processing circuit to perform a method comprising;
detecting an error in an array;
in response to detecting the error, writing error information to an error trap register, wherein the error information comprise error data and associated error detection information and a position in an array row;
reading the error information from the error trap register;
determining and fetching a corresponding data copy in the computer system for the read error information, wherein the corresponding data copy is a known good data copy of a data that includes the error and wherein the corresponding data copy is obtained from a different level cache than a location that includes the error;
determining one or more bit positions that caused the error by comparing the error data with the corresponding data copy; and
disabling those of the array cells that correspond to the determined one or more bit positions, wherein the disabling comprises reconfiguring the array to use redundant bits instead of the one or more bit positions and wherein the reconfiguring only prevents the use of the one or more bit positions.
1 Assignment
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Accused Products
Abstract
A method for performing a repair operation in a computer system using arrays having array cells includes detecting an error in an array. In response to detecting the error, error information is written to an error trap register. The error information includes error data and associated error detection information and a position in an array row. The error information is read from the error trap register and a corresponding data copy is determined and fetched in the computer system. One or more exact bit positions that caused the error are determined by comparing the error data with the corresponding data copy. The array cells which are associated with the determined one or more bit positions are disabled.
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Citations
7 Claims
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1. A computer program product for performing a repair operation in a computer system using arrays having array cells, the computer program product comprising:
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a tangible non-transitory storage medium readable by a processing circuit and storing instructions for execution by the processing circuit to perform a method comprising; detecting an error in an array; in response to detecting the error, writing error information to an error trap register, wherein the error information comprise error data and associated error detection information and a position in an array row; reading the error information from the error trap register; determining and fetching a corresponding data copy in the computer system for the read error information, wherein the corresponding data copy is a known good data copy of a data that includes the error and wherein the corresponding data copy is obtained from a different level cache than a location that includes the error; determining one or more bit positions that caused the error by comparing the error data with the corresponding data copy; and disabling those of the array cells that correspond to the determined one or more bit positions, wherein the disabling comprises reconfiguring the array to use redundant bits instead of the one or more bit positions and wherein the reconfiguring only prevents the use of the one or more bit positions. - View Dependent Claims (2, 3, 4, 5)
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6. A system for performing a repair operation in a computer system using arrays having array cells, the system comprising:
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a memory having computer readable computer instructions; and a processor for executing the computer readable instructions, the computer readable instructions including; detecting an error in an array; in response to detecting the error, writing error information to an error trap register, wherein the error information comprise error data and associated error detection information and a position in an array row; reading the error information from the error trap register; determining and fetching a corresponding data copy in the computer system for the read error information, wherein the corresponding data copy is a known good data copy of a data that includes the error and wherein the corresponding data copy is obtained from a different level cache than a location that includes the error; determining one or more bit positions that caused the error by comparing the error data with the corresponding data copy; and disabling those of the array cells that correspond to the determined one or more bit positions, wherein the disabling comprises reconfiguring the array to use redundant bits instead of the one or more bit positions and wherein the reconfiguring only prevents the use of the one or more bit positions. - View Dependent Claims (7)
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Specification