Method and system for MEMS devices with dual damascene formed electrodes

• US 9,919,915 B2
• Filed: 06/14/2016
• Issued: 03/20/2018
• Est. Priority Date: 06/14/2016
• Status: Active Grant

• Current Assignee: Invensense Incorporated (TDK Corporation)
• Original Assignee: Invensense Incorporated (TDK Corporation)
• Inventors: Huang, Chunchieh, Smeys, Peter
• Primary Examiner(s): RAHMAN, MOIN M
• Application Number:
  US15/182,172
• Publication Number:
  US 20170355593A1
• Time in Patent Office: 644 Days
• Field of Search: 438303, 438591, 438618, 438421, 438584, 438637, 438783, 438763
• CPC Class Codes: B81B 2207/012 the micromechanical device and the control or processing electronics being separate parts in the same package
• CPC Class Codes: B81B 2207/092 Buried interconnects in the substrate or in the lid
• CPC Class Codes: B81B 7/007 Interconnections between the MEMS and external electrical signals
• CPC Class Codes: B81C 1/00095 Interconnects
• CPC Class Codes: B81C 1/00301 Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
• CPC Class Codes: B81C 2203/0109 Bonding an individual cap on the substrate
• CPC Class Codes: B81C 2203/0792 Forming interconnections between the electronic processing unit and the micromechanical structure

Abstract

Methods and systems for MEMS devices with dual damascene formed electrodes is disclosed and may include forming first and second dielectric layers on a semiconductor substrate that includes a conductive layer at least partially covered by the first dielectric layer; removing a portion of the second dielectric layer; forming vias through the second dielectric layer and at least a portion of the second dielectric layer, where the via extends to the conductive layer; forming electrodes by filling the vias and a volume that is the removed portion of the second dielectric layer with a first metal; and coupling a micro-electro-mechanical systems (MEMS) substrate to the semiconductor substrate. A third dielectric layer may be formed between the first and second dielectric layers. A metal pad may be formed on at least one electrode by depositing a second metal on the electrode and removing portions of the second metal, which may be aluminum.

Claims

1. A manufacturing method, the method comprising:

forming first and second dielectric layers on a semiconductor substrate, said semiconductor substrate comprising a conductive layer at least partially covered by the first dielectric layer;

removing a defined portion of the second dielectric layer;

forming vias through the second dielectric layer, said via extending to the conductive layer, wherein the vias provide electrical interconnections through the second dielectric layer between devices in the semiconductor substrate and the conductive layer;

forming electrodes by filling the vias, and the defined portion of the second dielectric layer, with a first metal; and

coupling a micro-electro-mechanical systems (MEMS) substrate to the semiconductor substrate;

forming a metal pad on the at least one electrode by depositing a second metal on the at least one electrode and removing portions of the second metal, wherein a first gap between the semiconductor substrate and the MEMS substrate is between a first electrode that does not have the metal pad and a standoff formed in the MEMS substrate.

2. The method according to claim 1, comprising forming a third dielectric layer between the first and second dielectric layers.

3. The method according to claim 1, wherein the second metal comprises aluminum.

4. The method according to claim 1, comprising electrically coupling the MEMS substrate to the semiconductor substrate via the metal pad, the at least one electrode, and the conductive layer.

5. The method according to claim 1, comprising patterning a photoresist layer on the second dielectric layer and forming a cavity in the first and second dielectric layers exposing the conductive layer, said cavity adjacent to at least one of the electrodes.

6. The method according to claim 5, comprising coupling the MEMS substrate to the first metal layer.

7. The method according to claim 5, wherein a first gap between the semiconductor substrate and the MEMS substrate is between the exposed conductive layer and a first surface of the MEMS substrate.

8. The method according to claim 5, wherein a second gap between the semiconductor substrate and the MEMS substrate is between the at least one electrode and the MEMS substrate.

9. The method according to claim 1, wherein a third dielectric layer between the first and second dielectric layers comprises a high density plasma oxide located lateral to the first metal.

10. The method according to claim 1, wherein the second dielectric layer comprises a silicon-oxide-nitride material.

11. The method according to claim 1, comprising thinning the first metal using a chemical-mechanical polishing (CMP) process.

12. The method according to claim 11, comprising thinning the first metal using the CMP process stops until first metal is coplanar with a top surface of the second dielectric layer.

13. The method according to claim 1, comprising removing the second dielectric layer.

14. The method according to claim 1, wherein the first metal comprises tungsten.