Redundant backup using non-volatile memory
First Claim
Patent Images
1. A memory system comprising:
- a host interface couplable to a host computer;
a circuit coupled to the host interface by way of a data bus and an address and control (addr/cont) bus, the circuit operable to receive data from and deliver data to the host computer based on addr/cont signals received from the host computer;
a volatile memory subsystem coupled to the circuit by way of a first data bus and a first addr/cont bus;
a controller coupled to the circuit by way of a second data bus and a second addr/cont bus;
a voltage monitor circuit coupled to the controller, the voltage monitor circuit operable to monitor a voltage supplied by the host computer via the host interface and to provide a control signal to the controller in response to sensing one or more of a low voltage condition, an imminent power interruption, a power failure, a power reduction, or when power is restored; and
a non-volatile memory subsystem coupled to the controller by way of first and second channels, the non-volatile memory subsystem including (i) a first set of one or more non-volatile memory elements coupled to the first channel, and (ii) a second set of one or more non-volatile memory elements coupled to the second channel, the controller operable to communicate data, status and control information between the host and the non-volatile memory system by way of the host interface,wherein, in response to the control signal received from the voltage monitor circuit, the controller is operable to (i) receive data from the volatile memory subsystem by way of the circuit, (ii) write a first copy of the received data from the volatile memory subsystem into the first set of one or more non-volatile memory elements using the first channel, and (iii) write a second copy of the data into the second set of one or more non-volatile memory elements using the second channel.
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Abstract
Data stored in a volatile memory subsystem is backed up redundantly into first and second channels of a non-volatile memory subsystem. The data is retrieved from the volatile memory subsystem upon detection of a trigger condition indicative of real or imminent power loss or reduction and multiple copies are stored in dedicated non-volatile memory channels. The stored copies may be error checked and corrected, and re-written if necessary. The redundantly backed up data can be subsequently retrieved from the non-volatile memory subsystem, error-corrected, and an error-free copy communicated to the volatile memory subsystem.
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Citations
22 Claims
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1. A memory system comprising:
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a host interface couplable to a host computer; a circuit coupled to the host interface by way of a data bus and an address and control (addr/cont) bus, the circuit operable to receive data from and deliver data to the host computer based on addr/cont signals received from the host computer; a volatile memory subsystem coupled to the circuit by way of a first data bus and a first addr/cont bus; a controller coupled to the circuit by way of a second data bus and a second addr/cont bus; a voltage monitor circuit coupled to the controller, the voltage monitor circuit operable to monitor a voltage supplied by the host computer via the host interface and to provide a control signal to the controller in response to sensing one or more of a low voltage condition, an imminent power interruption, a power failure, a power reduction, or when power is restored; and a non-volatile memory subsystem coupled to the controller by way of first and second channels, the non-volatile memory subsystem including (i) a first set of one or more non-volatile memory elements coupled to the first channel, and (ii) a second set of one or more non-volatile memory elements coupled to the second channel, the controller operable to communicate data, status and control information between the host and the non-volatile memory system by way of the host interface, wherein, in response to the control signal received from the voltage monitor circuit, the controller is operable to (i) receive data from the volatile memory subsystem by way of the circuit, (ii) write a first copy of the received data from the volatile memory subsystem into the first set of one or more non-volatile memory elements using the first channel, and (iii) write a second copy of the data into the second set of one or more non-volatile memory elements using the second channel. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A memory system comprising:
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a host interface couplable to a host computer; a first non-volatile memory subsystem coupled to a first channel, the first non-volatile memory subsystem including a first set of one or more non-volatile memory elements; a second non-volatile memory subsystem coupled to a second channel, the second non-volatile memory subsystem including a second set of one or more non-volatile memory elements; and a controller coupled to the host interface by way of a data bus and an address and control (addr/cont) bus, the controller operable to receive data from and deliver data to the host computer via the data bus based on addr/cont signals received from the host computer via the addr/cont bus, the controller coupled to the first non-volatile memory subsystem by way of the first channel and to the second non-volatile memory subsystem by way of the second channel, wherein, in response to a data read request from the host computer, the controller is operable to; (i) read a first copy of the requested data from a first selected location of the first set of one or more non-volatile memory elements through the first channel, determine if the first copy contains a correctable error, and generate an error-free first copy of the requested data by repairing the first copy of the requested data if it contains a correctable error, (ii) read a second copy of the requested data from a second selected location of the second set of one or more non-volatile memory elements through the second channel, determine if the second copy contains a correctable error, generate an error-free second copy of the requested data by repairing the second copy of the requested data if the second copy of the requested data contains a correctable error, and replace the second copy of the requested data with the error-free first copy of the requested data if the second copy of the requested data contains an uncorrectable error, and (iii) transmit to the host computer an error-free copy of the requested data corresponding to the first or second error-free copy. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A memory system comprising:
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a host interface couplable to a host computer; a first non-volatile memory subsystem coupled to a first channel, the first non-volatile memory subsystem including a first set of one or more non-volatile memory elements; a second non-volatile memory subsystem coupled to a second channel, the second non-volatile memory subsystem including a second set of one or more non-volatile memory elements; a voltage monitor circuit couplable to the controller, the voltage monitor circuit operable to (i) monitor a supply voltage provided by the host computer via the host interface, and (ii) generate a control signal in response to a detected change in the monitored supply voltage; a controller coupled to the host interface by way of a data bus and an address and control (addr/cont) bus, the controller operable to receive data from and deliver data to the host computer based on addr/cont signals received from the host computer, the controller coupled to the first non-volatile memory subsystem by way of the first channel and to the second non-volatile memory subsystem by way of the second channel, wherein the controller initiates a data read request in response to the control signal; and a volatile memory subsystem coupled to the controller, wherein, in response to the data read request, the controller is operable to (i) read a first copy of the requested data from a first selected location of the first set of one or more non-volatile memory elements using the first channel, determine if the first copy contains correctable errors, and repair the first copy if it includes correctable errors, (ii) read a second copy of the requested data from a second selected location of the second set of one or more non-volatile memory elements using the second channel, determine if the second copy contains correctable errors, and repair the second copy if it includes correctable errors, and (iii) provide an error-free copy of the requested data, corresponding to the repaired first or second copy, to the volatile memory subsystem. - View Dependent Claims (19, 20, 21, 22)
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Specification