Methods, circuits and systems for a package structure having wireless lateral connections

• US 9,922,945 B2
• Filed: 07/31/2015
• Issued: 03/20/2018
• Est. Priority Date: 06/15/2012
• Status: Active Grant

• Current Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Inventors: Ziglioli, Federico Giovanni, Pagani, Alberto
• Primary Examiner(s): Sandvik, Benjamin
• Assistant Examiner(s): Khan, Farid
• Application Number:
  US14/815,527
• Publication Number:
  US 20150357294A1
• Time in Patent Office: 963 Days
• CPC Class Codes: H01L 21/441 Deposition of conductive or insulating materials for electrodes
• CPC Class Codes: H01L 21/50 Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/768 Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/49109 outside the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/48 Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
• CPC Class Codes: H01L 23/49537 Plurality of lead frames mounted in one device
• CPC Class Codes: H01L 23/49551 characterised by bent parts
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 23/49805 the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/5385 : Assembly of a plurality of insulating substrates
• CPC Class Codes: H01L 23/642 : Capacitive arrangements H01L23/49589, H01L23/645, H01L23/647, H01L23/66 take precedence; capacitive effects between wiring layers on the semiconductor body H01L23/5222
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 28/40 : Capacitors
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/07802 : not being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/181 : Encapsulation

Abstract

A packaged semiconductor device includes a communication pad formed in a side surface, which is operatively coupled to a communication circuit so as to enable the establishing of a wireless communication channel to an adjacently positioned packaged semiconductor device. The communication pad may be formed upon cutting a block including the packaged semiconductor device and an appropriately positioned and dimensioned conductor.

Claims

1. A method of forming a packaged semiconductor device, the method comprising:

forming a block of insulating material having embedded therein an integrated circuit chip and a wiring system coupled to the integrated-circuit chip, the integrated-circuit chip including a communication circuit operatively coupled to a conductor extending in the block of insulating material; and

cutting the block of insulating material through the conductor to form a side surface of the packaged semiconductor device and expose a cut surface of the conductor only on the side surface as a first communication pad for wireless signal exchange, wherein the conductor is formed so as to have a first lateral extension at a first height level and a second lateral extension at a second height level, wherein the first lateral extension is greater than the second lateral extension.

2. The method of claim 1, wherein forming the block of insulating material includes providing a lead frame, coupling at least one conductor branch of the lead frame with the communication circuit, and embedding the lead frame in the block of insulating material.

3. The method of claim 2, further comprising bending the at least one conductor branch so as to adjust a height level of the first communication pad.

4. The method of claim 3, further comprising coupling a second conductor branch of the lead frame with the communication circuit and using the second conductor branch so as to define a second height level for a second communication pad in the side surface.

5. The method of claim 4, further comprising positioning at least one further lead frame above the lead frame so as to form a stacked configuration.

6. The method of claim 1, further comprising forming the conductor on a carrier substrate by a plating process.

7. The method of claim 1, wherein the second lateral extension is less than a width of a cut line formed in the block of insulating material when cutting the block and the conductor.

8. A method of forming a packaged semiconductor device, the method comprising:

forming a block of insulating material having embedded therein an integrated circuit chip and a wiring system coupled to the integrated-circuit chip, the integrated-circuit chip including a communication circuit operatively coupled to a conductor extending in the block of insulating material;

cutting the block of insulating material through the conductor to form a side surface of the packaged semiconductor device and expose a cut surface of the conductor only on the side surface as a first communication pad for wireless signal exchange;

forming a plurality of conductors in the block of insulating material as respective metal traces at two or more different height levels above a substrate of the packaged semiconductor device; and

cutting through the plurality of conductors so as to provide a plurality of communication pads in the side surface.

9. The method of claim 8, wherein forming the block of insulating material comprises:

providing a lead frame including a plurality of conductor branches;

coupling at least one conductor branch of the lead frame with the communication circuit; and

encapsulating the lead frame in the block of insulating material.

10. The method of claim 9, further comprising deforming the at least one conductor branch to adjust a height level of the first communication pad.

11. The method of claim 10, further comprising:

coupling another one of the at least one conductor branches of the lead frame with the communication circuit; and

defining a second height level for a second communication pad in the side surface with the second conductor branch.

12. The method of claim 11, further comprising positioning at least one further lead frame above the lead frame to form a stacked configuration.

13. The method of claim 8, further comprising attaching the semiconductor package device to a carrier substrate by a plating process.

14. A method of forming a packaged semiconductor device, the method comprising:

forming a block of insulating material having embedded therein an integrated circuit chip and a wiring system coupled to the integrated-circuit chip, the integrated-circuit chip including a communication circuit operatively coupled to a conductor extending in the block of insulating material;

cutting the block of insulating material through the conductor to form a side surface of the packaged semiconductor device;

forming a first metal trace as a first portion of the conductor at a first height level and a second metal trace as a second portion of the conductor at a second height level above a substrate of the packaged semiconductor device; and

forming a via so as to couple the first and second metal traces; and

cutting through the block of insulating material, the first metal trace, the second metal trace, and the via to provide communication pads on the side surface.

15. The method of claim 14, wherein forming the block of insulating material comprises:

providing a lead frame including a plurality of conductor branches;

coupling at least one conductor branch of the lead frame with the communication circuit; and

embedding the lead frame in the block of insulating material.

16. The method of claim 15, further comprising bending the at least one conductor branch to adjust a height level of the first communication pad.

17. The method of claim 16, further comprising:

coupling another one of the at least one conductor branches of the lead frame to the communication circuit; and

defining a second height level for a second communication pad in the side surface with the second conductor branch.

18. The method of claim 14, further comprising positioning at least one further lead frame above the lead frame to form a stacked configuration.

19. The method of claim 14, wherein cutting through the block of insulating material, the first metal trace, the second metal trace, and the via comprises providing the communication pads coplanar with the side surface.