Processing of a direct-bandgap chip after bonding to a silicon photonic device

• US 9,923,105 B2
• Filed: 10/08/2014
• Issued: 03/20/2018
• Est. Priority Date: 10/09/2013
• Status: Active Grant

• Current Assignee: Skorpios Technologies Inc.
• Original Assignee: Skorpios Technologies Inc.
• Inventors: Krasulick, Stephen B., Dallesasse, John, Mizrahi, Amit, Creazzo, Timothy, Marchena, Elton, Spann, John Y.
• Primary Examiner(s): Jahan, Bilkis
• Assistant Examiner(s): BARZYKIN, VICTOR V
• Application Number:
  US14/509,975
• Publication Number:
  US 20150099318A1
• Time in Patent Office: 1,259 Days
• CPC Class Codes: G02B 6/12004 Combinations of two or more optical elements
• CPC Class Codes: H01L 31/02327 the optical elements being integrated or being directly associated to the device, e.g. back reflectors optical coatings H01L31/0216
• CPC Class Codes: H01S 2301/176 Specific passivation layers on surfaces other than the emission facet
• CPC Class Codes: H01S 5/0207 Substrates having a special shape
• CPC Class Codes: H01S 5/021 Silicon based substrates
• CPC Class Codes: H01S 5/0217 Removal of the substrate
• CPC Class Codes: H01S 5/0218 Substrates comprising semiconducting materials from other groups of the Periodic Table than the materials of the active layer
• CPC Class Codes: H01S 5/02325 Mechanically integrated components on mount members or optical micro-benches
• CPC Class Codes: H01S 5/02326 Arrangements for relative positioning of laser diodes and optical components, e.g. grooves in the mount to fix optical fibres or lenses
• CPC Class Codes: H01S 5/0234 Up-side down mountings, e.g. Flip-chip, epi-side down mountings or junction down mountings
• CPC Class Codes: H01S 5/0237 by soldering
• CPC Class Codes: H01S 5/02375 Positioning of the laser chips
• CPC Class Codes: H01S 5/02469 Passive cooling, e.g. where heat is removed by the housing as a whole or by a heat pipe without any active cooling element like a TEC
• CPC Class Codes: H01S 5/026 Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers stabilisation of output H01S5/06
• CPC Class Codes: H01S 5/3013 AIIIBV compounds

Abstract

A method for fabricating a photonic composite device for splitting functionality across materials comprises providing a composite device having a platform and a chip bonded in the platform. The chip is processed comprising patterning, etching, deposition, and/or other processing steps while the chip is bonded to the platform. The chip is used as a gain medium and the platform is at least partially made of silicon.

Claims

1. A method for fabricating a composite device for splitting functionality across two or more materials, the method comprising:

providing a composite device, the composite device comprising;

a platform, wherein;

the platform comprises a wall forming a part of a recess; and

the platform comprises a first material;

a chip, wherein;

the chip is bonded in the recess of the platform; and

the chip comprises a second material; and

a material between the wall and the chip forming an optical bridge;

masking the composite device to define an area on the chip to etch;

etching the chip to form a waveguide on the chip, after the chip is bonded to the platform; and

etching the material between the wall and the chip concurrently with etching the chip to form a waveguide on the optical bridge, which is aligned with the waveguide on the chip to guide light from the chip to the platform.

2. The method for fabricating the composite device as recited in claim 1, wherein the first material is silicon.

3. The method for fabricating the composite device as recited in claim 1, wherein the second material is a III-V material.

4. The method for fabricating the composite device as recited in claim 1, wherein the waveguide on the chip is aligned with a waveguide in the platform by using photolithography processes to form the waveguide on the chip after the chip is bonded to the platform.

5. The method for fabricating the composite device as recited in claim 1, the method further comprising covering the chip to hermetically seal the chip in the recess.

6. The method for fabricating the composite device as recited in claim 1, wherein etching the chip is performed in a processing chamber used to make CMOS devices.

7. The method for fabricating the composite device as recited in claim 1, wherein:

a gap between the chip and the platform is at least partially filled with a third material; and

the third material is etched concurrently with etching the chip.

8. The method for fabricating the composite device as recited in claim 1, wherein:

the composite device comprises a plurality of chips;

each of the plurality of chips is bonded in a corresponding recess of the platform;

each of the plurality of chips is etched concurrently with etching the chip; and

a number of the plurality of chips exceeds 500.