Digital predistortion for dual-band power amplifiers

• US 9,923,595 B2
• Filed: 06/24/2016
• Issued: 03/20/2018
• Est. Priority Date: 04/17/2013
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Molina, Albert, Azadet, Kameran
• Primary Examiner(s): Washburn, Daniel
• Assistant Examiner(s): Singh, Amneet
• Application Number:
  US15/191,583
• Publication Number:
  US 20160308577A1
• Time in Patent Office: 634 Days
• CPC Class Codes: G06F 30/00 Computer-aided design [CAD]
• CPC Class Codes: G06F 30/20 Design optimisation, verification or simulation optimisation, verification or simulation of circuit designs G06F30/30
• CPC Class Codes: G06F 30/30 Circuit design
• CPC Class Codes: G06F 30/36 Circuit design at the analogue level
• CPC Class Codes: H03F 1/3241 using predistortion circuits H03F1/3211, H03F1/3217 take precedence
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H04B 1/525 with means for reducing leakage of transmitter signal into the receiver
• CPC Class Codes: H04B 1/62 for providing a predistortion of the signal in the transmitter and corresponding correction in the receiver, e.g. for improving the signal/noise ratio
• CPC Class Codes: H04J 11/004 using regenerative subtractive interference cancellation
• CPC Class Codes: H04L 25/03012 operating in the time domain H04L25/03165, H04L25/03178 take precedence
• CPC Class Codes: H04L 25/03343 Arrangements at the transmitter end
• CPC Class Codes: H04L 27/367 using predistortion
• CPC Class Codes: H04L 27/368 adaptive predistortion
• CPC Class Codes: H04L 5/1461 Suppression of signals in the return path, i.e. bidirectional control circuits

Abstract

A signal processing circuit arrangement may include a preamplifier circuit configured to map a first dimension input and a second dimension input to a first subset of a plurality of lookup table coefficients of a two-dimensional (2D) lookup table, wherein the first dimension input and the second dimension input each represent a signal level of one or more input signals, extrapolate from the first subset of the plurality of lookup table coefficients to generate a lookup table output, and apply the lookup table output to the one or more input signals to generate a predistorted input signal for an amplifier.

Claims

1. A signal processing circuit arrangement comprising:

a preamplifier circuit configured to;

map a first dimension input and a second dimension input to a first subset of a plurality of lookup table coefficients of a two-dimensional (2D) lookup table, wherein the first dimension input and the second dimension input each represent a signal level of one or more input signals;

extrapolate from the first subset of the plurality of lookup table coefficients to generate a lookup table output; and

apply the lookup table output to the one or more input signals to generate a predistorted input signal for an amplifier;

a feedback circuit configured to monitor an output signal of the amplifier; and

an adaptation circuit configured to adapt the plurality of lookup table coefficients based on the output signal of the amplifier,

wherein the preamplifier circuit is further configured to assign each of a plurality of predefined regions of the 2D lookup table as an interpolation region or an extrapolation region, and to reassign at least one of the plurality of predefined regions of the 2D lookup table.

2. The signal processing circuit arrangement of claim 1, further comprising the amplifier.

3. The signal processing circuit arrangement of claim 2, further comprising a mixing circuit configured to modulate the predistorted input signal with a radio frequency signal to obtain a modulated predistorted input signal,

wherein the amplifier is configured to amplify the predistorted input signal.

4. The signal processing circuit arrangement of claim 1, wherein the first dimension input represents a real part of a first complex sample of a first input signal of the one or more input signals and the second dimension input represents an imaginary part of the first complex sample of the first input signal.

5. The signal processing circuit arrangement of claim 1, wherein the first dimension input represents a signal level of a first input signal of the one or more input signals and the second dimension input represents a signal level of a second input signal of the one or more input signals.

6. The signal processing circuit arrangement of claim 1, wherein the preamplifier circuit is further configured to generate one or more additional lookup table outputs from one or more additional 2D lookup tables.

7. The signal processing circuit arrangement of claim 6, wherein the preamplifier circuit is configured to apply the lookup table output to the one or more input signals to generate the predistorted input signal for the amplifier by:

identifying one or more input samples of the one or more input signals;

evaluating one or more functions of the one or more input samples to obtain one or more function outputs; and

determining one or more intermediate products by multiplying each of the one or more function outputs by a respective lookup table output of the one or more additional lookup table outputs; and

generating the predistorted input signal for the amplifier as a sum of the one or more intermediate products.

8. The signal processing circuit arrangement of claim 7, wherein each of the one or more input samples are samples of a first input signal of the one or more input signals.

9. The signal processing circuit arrangement of claim 7, wherein the one or more input samples comprise input samples of a first input signal of the one or more input signals and a second input signal of the one or more input signals.

10. The signal processing circuit arrangement of claim 9, wherein the amplifier is a dual-band amplifier, and wherein the first input signal corresponds to a first frequency band of the dual-band amplifier and the second input signal corresponds to a second frequency band of the dual-band amplifier.

11. The signal processing circuit arrangement of claim 1, wherein the preamplifier circuit is further configured to:

map the first dimension input and the second dimension input to one or more additional 2D lookup tables;

interpolate or extrapolate with the one or more additional 2D lookup tables to generate one or more additional lookup table outputs,

wherein the preamplifier circuit is configured to apply the lookup table output to the one or more input signals to generate the predistorted input signal for the amplifier by;

combining the lookup table output and the one or more additional lookup table outputs to generate the predistorted input signal.

12. The signal processing circuit arrangement of claim 1, wherein a point formed by the first dimension input and the second dimension input falls within an extrapolation region.

13. The signal processing circuit arrangement of claim 1, wherein the preamplifier circuit is configured to reassign the at least one of the plurality of predefined regions of the 2D lookup table by:

monitoring a plurality of pairs of first dimension inputs and second dimension inputs received for the 2D lookup table; and

reassigning a first region of the plurality of predefined regions as an interpolation region if more than a predefined quantity of the plurality of pairs fall within the first region and reassigning the first region as an extrapolation region if less than the predefined quantity of the plurality of pairs fall within the first region.

14. A signal processing circuit arrangement comprising:

a first DPD circuit configured to;

map a first dimension input and a second dimension input to one or more first two-dimensional (2D) lookup tables, wherein the first dimension input represents a signal level of a first input signal and the second dimension input represents a signal level of a second input signal, and to extrapolate from lookup table coefficients of a first 2D lookup table of the one or more first 2D lookup tables to obtain a first intermediate signal;

a second DPD circuit configured to;

map the first dimension input and the second dimension input to one or more second 2D lookup tables, and to interpolate or extrapolate with lookup table coefficients of the one or more second 2D lookup tables to obtain a second intermediate signal;

a combination circuit configured to combine the first intermediate signal and the second intermediate signal to obtain a predistorted input signal for an amplifier;

a feedback circuit configured to monitor an output signal of the amplifier; and

an adaptation circuit configured to adapt the plurality of lookup table coefficients based on the output signal of the amplifier,

wherein the first DPD circuit is further configured to assign each of a plurality of regions of a first 2D lookup table of the one or more first 2D lookup tables as an interpolation region or an extrapolation region, and to reassign at least one of the plurality of predefined regions of the first 2D lookup table.

15. The signal processing circuit arrangement of claim 14, further comprising the amplifier.

16. The signal processing circuit arrangement of claim 14, wherein the combination circuit is configured to combine the first intermediate signal and the second intermediate signal to obtain the predistorted input signal by:

upsampling and upconverting the first intermediate signal and the second intermediate signal to obtain a first resulting signal and a second resulting signal; and

summing the first resulting signal and the second resulting signal to obtain the predistorted input signal.

17. The signal processing circuit arrangement of claim 14, wherein the first DPD circuit is configured to extrapolate from the lookup table coefficients of the first 2D lookup table of the one or more first 2D lookup tables to obtain the first intermediate signal by:

generating a lookup table output from each of the one or more first 2D lookup tables to obtain one or more lookup table outputs;

identifying one or more samples of the first input signal and the second input signal;

evaluating one or more functions of the one or more samples to obtain one or more function outputs;

determining one or more intermediate products by multiplying each of the one or more function outputs by a respective lookup table output of the one or more lookup table outputs;

generating the first intermediate signal as a sum of the one or more intermediate products.

18. The signal processing circuit arrangement of claim 14, wherein the second DPD circuit is configured to interpolate or extrapolate with the lookup table coefficients of the one or more second 2D lookup tables to obtain the second intermediate signal by:

generating a lookup table output from each of the one or more second 2D lookup tables to obtain one or more lookup table outputs;

identifying one or more samples of the first input signal and the second input signal;

evaluating one or more functions of the one or more samples to obtain one or more function outputs;

determining one or more intermediate products by multiplying each of the one or more function outputs by a respective lookup table output of the one or more lookup table outputs;

generating the second intermediate signal as a sum of the one or more intermediate products.

19. The signal processing circuit arrangement of claim 14, wherein the amplifier is a dual-band radio amplifier and the first input signal corresponds to a first frequency band of the amplifier and the second input signal corresponds to a second frequency band of the amplifier.

20. A method of preprocessing amplifier input signals, the method comprising:

mapping a first dimension input and a second dimension input to a first subset of a plurality of lookup table coefficients of a two-dimensional (2D) lookup table, wherein the first dimension input and the second dimension input each represent a signal level of one or more input signals;

extrapolating from the first subset of the plurality of lookup table coefficients to generate a lookup table output;

applying the lookup table output to the one or more input signals to generate a predistorted input signal for an amplifier;

monitoring an output signal of the amplifier;

adapting the plurality of lookup table coefficients based on the output signal of the amplifier;

assigning each of a plurality of predefined regions of the 2D lookup table as an interpolation region or an extrapolation region; and

reassigning at least one of the plurality of predefined regions of the 2D lookup table.

21. The method of claim 20, further comprising:

generating one or more additional lookup table outputs from one or more additional 2D lookup tables.

22. The method of claim 21, wherein applying the lookup table output to the one or more input signals to generate the predistorted input signal for the amplifier comprises:

identifying one or more input samples of the one or more input signals;

evaluating one or more functions of the one or more input samples to obtain one or more function outputs; and

determining one or more intermediate products by multiplying each of the one or more function outputs by a respective lookup table output of the one or more additional lookup table outputs; and

generating the predistorted input signal for the amplifier as a sum of the one or more intermediate products.