Recovery from cross-temperature read failures by programming neighbor word lines

• US 9,928,126 B1
• Filed: 09/27/2017
• Issued: 03/27/2018
• Est. Priority Date: 06/01/2017
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Shappir, Assaf, Neerman, Moshe, Shapira, Ofer
• Primary Examiner(s): Byrne, Harry W
• Application Number:
  US15/716,684
• Time in Patent Office: 181 Days
• Field of Search: 365211
• CPC Class Codes: G06F 11/002 protecting against parasitic influences, e.g. noise, temperatures
• CPC Class Codes: G06F 11/1048 using arrangements adapted for a specific error detection or correction feature
• CPC Class Codes: G06F 11/1072 in multilevel memories
• CPC Class Codes: G06F 11/108 Parity data distribution in semiconductor storages, e.g. in SSD
• CPC Class Codes: G06F 11/3058 Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations thermal management in cooling arrangements of a computing system G06F1/206
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 7/04 with means for avoiding disturbances due to temperature effects

Abstract

A memory system includes an interface and storage circuitry. The interface is configured to communicate with memory cells that store data. The storage circuitry is configured to program a data unit to a first group of the memory cells, to read the data unit from the first group using at least a read threshold to produce a first readout, and in response to detecting that reading the data unit has failed because the read threshold has fallen outside a supported range of read thresholds, due to a temperature difference between a time of programming the first group and a time of reading the first group, to program a second group of the memory cells. The circuitry is further configured to re-read the data unit from the first group using the at least read threshold to produce a second readout, and to recover the data unit from the second readout.

Claims

1. A memory system, comprising:

an interface, configured to communicate with a plurality of memory cells that store data by setting the memory cells to analog voltages representative of respective storage values; and

storage circuitry configured to;

program a data unit to a first group of the memory cells;

read the data unit from the first group using at least a read threshold to produce a first readout;

in response to detecting that reading the data unit has failed because at the time of reading the first group, the read threshold has fallen outside a range of read thresholds supported by the memory cells, due to a temperature difference between a time of programming the first group and a time of reading the first group, program a second different group of the memory cells;

after programming the second group, re-read the data unit from the first group using the at least read threshold to produce a second readout; and

recover the data unit from the second readout.

2. The memory system according to claim 1, wherein the storage values correspond to respective predefined programming levels, and wherein the storage circuitry is configured to program at least some of the memory cells in the second group to a highest or to a lowest programming level among the predefined programming levels.

3. The memory system according to claim 2, wherein the storage circuitry is configured to identify, in the first group, one or more memory cells that are estimated to have been read incorrectly, and to program only memory cells in the second group having same respective indices as the identified memory cells of the first group, to the highest or to the lowest programming level.

4. The memory system according to claim 2, wherein the storage circuitry is configured to predefine an intermediate programming level between the highest and the lowest programming levels, and to program to the highest programming level only the memory cells in the second group that belong to programming levels above the intermediate programming level.

5. The memory system according to claim 1, wherein the storage circuitry is configured to evict all data stored in the second group to another group of memory cells, to erase the memory cells in the second group, and then to program the second group.

6. The memory system according to claim 1, wherein the memory cells are arranged in multiple memory blocks that comprise multiple word lines, and wherein the first group and the second group belong to respective first and second non-adjacent word lines in a common memory block.

7. The memory system according to claim 1, wherein the storage circuitry is configured to program the second group without first erasing the memory cells in the second group.

8. The memory system according to claim 1, wherein the first group comprises a Word Line (WL) in a memory block, and wherein, in response to detecting that reading the data unit from the first group has failed, the storage circuitry is configured to evict to another memory block all WLs in the memory block that read correctly, to scan the remaining WLs that failed, and to recover data read from each of the remaining WLs by programming one or more of the WLs that were evicted.

9. The memory system according to claim 1, wherein the storage circuitry is configured to program the second group using a programming scheme that comprises less than a number of programming levels used in programming the first group.

10. A method for data storage, comprising:

in a memory system comprising a plurality of memory cells that store data by setting the memory cells to analog voltages representative of respective storage values,

programming a data unit to a first group of the memory cells;

reading the data unit from the first group using at least a read threshold to produce a first readout;

in response to detecting that reading the data unit has failed because, at the time of reading the first group, the read threshold has fallen outside a range of read thresholds supported by the memory cells, due to a temperature difference between a time of programming the first group and a time of reading the first group, programming a second different group of the memory cells;

after programming the second group, re-reading the data unit from the first group using the at least read threshold to produce a second readout; and

recovering the data unit from the second readout.

11. The method according to claim 10, wherein the storage values correspond to respective predefined programming levels, and wherein programming the second group comprises programming at least some of the memory cells in the second group to a highest or to a lowest programming level among the predefined programming levels.

12. The method according to claim 11, and comprising identifying, in the first group, one or more memory cells that are estimated to have been read incorrectly, wherein programming the second group comprises programming only memory cells in the second group having same respective indices as the identified memory cells of the first group, to the highest or to the lowest programming level.

13. The method according to claim 11, and comprising predefining an intermediate programming level between the highest and the lowest programming levels, wherein programming the second group comprises programming to the highest programming level only the memory cells in the second group that belong to programming levels above the intermediate programming level.

14. The method according to claim 10, wherein programming the second group comprises evicting all data stored in the second group to another group of memory cells, erasing the memory cells in the second group, and then programming the second group.

15. The method according to claim 10, wherein the memory cells are arranged in multiple memory blocks that comprise multiple word lines, and wherein the first group and the second group belong to respective first and second non-adjacent word lines in a common memory block.

16. The method according to claim 10, wherein the programming the second group comprises programming the second group without first erasing the memory cells in the second group.

17. The method according to claim 10, wherein the first group comprises a Word Line (WL) in a memory block, and comprising, in response to detecting that reading the data unit from the first group has failed, evicting to another memory block all WLs in the memory block that read correctly, scanning the remaining WLs that failed, and recovering data read from each of the remaining WLs by programming one or more of the WLs that were evicted.

18. The method according to claim 10, wherein programming the second group comprises programming the second group using a programming scheme that comprises less than a number of programming levels used in programming the first group.