Flash-DRAM hybrid memory module

• US 9,928,186 B2
• Filed: 08/31/2015
• Issued: 03/27/2018
• Est. Priority Date: 06/01/2007
• Status: Active Grant

• Current Assignee: Netlist, Inc.
• Original Assignee: Netlist, Inc.
• Inventors: Lee, Hyun, Chen, Chi-She, Solomon, Jeffrey C., Milton, Scott H., Bhakta, Jayesh
• Primary Examiner(s): ELMORE, STEPHEN C
• Application Number:
  US14/840,865
• Publication Number:
  US 20160196223A1
• Time in Patent Office: 939 Days
• Field of Search: 711103, 711111, 711112, 711114, 711154, 711156, 36518533
• CPC Class Codes: G06F 1/185 Mounting of expansion boards
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0638 Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module address formation of the next microinstruction G06F9/26; masking faults in memories by using spares or by reconfiguring G11C29/70
• CPC Class Codes: G06F 13/1694 Configuration of memory controller to different memory types
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence
• CPC Class Codes: G06F 13/4027 using bus bridges G06F13/4022 takes precedence
• CPC Class Codes: G06F 13/4243 with synchronous protocol
• CPC Class Codes: G06F 2212/205 Hybrid memory, e.g. using both volatile and non-volatile memory
• CPC Class Codes: G06F 2212/7208 Multiple device management, e.g. distributing data over multiple flash devices
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0685 Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays
• CPC Class Codes: G11C 11/005 comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
• CPC Class Codes: G11C 11/409 Read-write [R-W] circuits
• CPC Class Codes: G11C 14/0018 whereby the nonvolatile element is an EEPROM element, e.g. a floating gate or metal-nitride-oxide-silicon [MNOS] transistor
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 7/1072 for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A memory module that is couplable to a memory controller hub (MCH) of a host system includes a non-volatile memory subsystem, a data manager coupled to the non-volatile memory subsystem, a volatile memory subsystem coupled to the data manager and operable to exchange data with the non-volatile memory subsystem by way of the data manager, and a controller operable to receive read/write commands from the MCH and to direct transfer of data between any two or more of the MCH, the volatile memory subsystem, and the non-volatile memory subsystem based on the commands.

Claims

1. A memory module comprising:

a data manager configured to be coupled to a memory controller of a host system using a data bus, the data manager is operable to communicate data signals with the memory controller of the host system by way of the data bus in accordance with a first protocol;

a first volatile memory subsystem coupled to the data manager using a first data bus, the first volatile memory subsystem is operable to communicate data signals with the data manager by way of the first data bus in accordance with the first protocol;

a second volatile memory subsystem coupled to the data manager using a second data bus, the second volatile memory subsystem is operable to communicate data signals with the data manager by way of the second data bus in accordance with the first protocol;

a non-volatile memory subsystem coupled to the data manager using a third data bus, the non-volatile memory subsystem is operable to communicate data signals with the data manager by way of the third data bus using a second protocol; and

a controller operable to receive one or more commands from the memory controller of the host system in accordance with the first protocol, and in response to the one or more commands received from the memory controller of the host system, the controller generates and transmits one or more control signals to the data manager, wherein, in response to the one or more control signals, the data manager transfers data between the first volatile memory subsystem and the memory controller of the host system, and transfers data signals from the non-volatile memory subsystem to the second volatile memory subsystem by way of the third data bus and the second data bus.

2. The memory module of claim 1, wherein the second protocol is different from the first protocol.

3. The memory module of claim 2, wherein the first protocol is selected from the group consisting of DDR, DDR2, DDR3, and DDR4 protocols.

4. The memory module of claim 1, wherein the data manager controls data traffic between any one of the first volatile memory subsystem and the second volatile memory subsystem and any one of the non-volatile memory subsystem and the memory controller of the host system based on one or more commands received from the controller.

5. The memory module of claim 1, wherein the data manager controls a starting time of a data transfer between any one of the first volatile memory subsystem and the second volatile memory subsystem and any one of the non-volatile memory subsystem and the memory controller of the host system based on one or more commands or control signals received from the controller.

6. The memory module of claim 1, wherein the data manager is configured as a bi-directional data transfer fabric.

7. The memory module of claim 1, wherein the data manager is operable to concurrently transfer data (i) between the first volatile memory subsystem and the memory controller of the host system, and (ii) between the non-volatile memory subsystem and the second volatile memory subsystem.

8. The memory module of claim 1, wherein the data manager further comprises a data formatting subsystem operable to format data to be transferred via the data bus, the first data bus, the second data bus and the third data bus.

9. A memory module couplable to a memory controller of a host system, the memory module comprising:

a non-volatile memory (NVM) subsystem coupled to a NVM controller;

a data manager coupled to a data manager controller and to the NVM subsystem;

a volatile memory (VM) subsystem coupled to a VM controller and to the data manager; and

a controller operable to receive a command from the memory controller of the host system, the controller including the NVM controller, the VM controller, and the data manager controller, the VM controller is operable (i) to generate and transmit a first command to the VM subsystem in response to the command received from the memory controller of the host system, and (ii) to generate and transmit a second command to the VM subsystem, wherein the second command is generated by the VM controller independently from the command received from the memory controller of the host system, and wherein the controller is operable to direct (i) operation of the NVM subsystem by way of the NVM controller, (ii) operation of the VM subsystem by way of the VM controller, and (iii) operation of the data manager by way of the data manager controller to transfer data between any two or more of the memory controller of the host system, the VM subsystem, and the NVM subsystem based on any one of the first command and the second command.

10. The memory module of claim 9, wherein the controller further includes an interface scheduler, the interface scheduler schedules the VM subsystem operation and the NVM subsystem operation such that no resource conflict occurs in the data manager.

11. The memory module of claim 9, wherein the controller further includes an interface scheduler, the interface scheduler assigns time slots for the VM controller and the NVM controller based on current command status and a pending command received or to be received from the memory controller of the host system.

12. The memory module of claim 9, wherein the VM subsystem is operable to exchange data with the NVM subsystem by way of the data manager in response to the second command received from the VM controller.

13. A memory module couplable to a memory controller of a host system, the memory module comprising:

a non-volatile memory (NVM) subsystem coupled to a NVM controller;

a data manager coupled to a data manager controller and to the NVM subsystem;

a volatile memory (VM) subsystem coupled to a VM controller and to the data manager; and

a controller operable to receive a command from the memory controller of the host system, the controller including the NVM controller, the VM controller, and the data manager controller, the VM controller is operable (i) to generate and transmit a first command to the VM subsystem in response to the command received from the memory controller of the host system, and (ii) to generate and transmit a second command to the VM subsystem, wherein the second command is generated by the VM controller independently from the command received from the memory controller of the host system, and wherein the controller is operable to direct (i) operation of the NVM subsystem by way of the NVM controller, (ii) operation of the VM subsystem by way of the VM controller, and (iii) operation of the data manager by way of the data manager controller to transfer data between any two or more of the memory controller of the host system, the VM subsystem, and the NVM subsystem based on any one of the first command and the second command, wherein the controller further includes an interface scheduler, if the command received by the controller from the memory controller of the host system is a read or write operation from/to the VM subsystem that conflicts with an operation being executed by VM subsystem in response to the second command, then the interface scheduler instructs the VM controller (i) to abort the current operation of VM subsystem, and (ii) to execute an operation in response to the first command.

14. A memory module couplable to a memory controller of a host system, the memory module comprising:

a non-volatile memory (NVM) subsystem coupled to a NVM controller;

a data manager coupled to a data manager controller and to the NVM subsystem;

a volatile memory (VM) subsystem coupled to a VM controller and to the data manager; and

a controller operable to receive a command from the memory controller of the host system, the controller including the NVM controller, the VM controller, and the data manager controller, the VM controller is operable (i) to generate and transmit a first command to the VM subsystem in response to the command received from the memory controller of the host system, and (ii) to generate and transmit a second command to the VM subsystem, wherein the second command is generated by the VM controller independently from the command received from the memory controller of the host system, and wherein the controller is operable to direct (i) operation of the NVM subsystem by way of the NVM controller, (ii) operation of the VM subsystem by way of the VM controller, and (iii) operation of the data manager by way of the data manager controller to transfer data between any two or more of the memory controller of the host system, the VM subsystem, and the NVM subsystem based on any one of the first command and the second command, wherein the controller further includes an interface scheduler, if the command received by the controller from the memory controller of the host system is a read or write operation from/to the VM subsystem that conflicts with an operation being executed by VM subsystem in response to the second command, then the interface scheduler instructs the VM controller to complete the current operation of VM subsystem before executing an operation in response to the first command.

15. A memory module couplable to a memory controller of a host system, the memory module comprising:

a non-volatile memory (NVM) subsystem coupled to a NVM controller;

a data manager coupled to a data manager controller and to the NVM subsystem;

a volatile memory (VM) subsystem coupled to a VM controller and to the data manager; and

a controller operable to receive a command from the memory controller of the host system, the controller including the NVM controller, the VM controller, and the data manager controller, the VM controller is operable (i) to generate and transmit a first command to the VM subsystem in response to the command received from the memory controller of the host system, and (ii) to generate and transmit a second command to the VM subsystem, wherein the second command is generated by the VM controller independently from the command received from the memory controller of the host system, and wherein the controller is operable to direct (i) operation of the NVM subsystem by way of the NVM controller, (ii) operation of the VM subsystem by way of the VM controller, and (iii) operation of the data manager by way of the data manager controller to transfer data between any two or more of the memory controller of the host system, the VM subsystem, and the NVM subsystem based on any one of the first command and the second command, wherein the controller further includes an interface scheduler, if the command received by the controller from the memory controller of the host system is a read or write operation from/to the VM subsystem that conflicts with an operation being executed by VM subsystem in response to the second command, then the interface scheduler instructs the VM controller (i) to halt the current operation of VM subsystem, (ii) to execute an operation in response to the first command, and (iii) to resume the operation in response to the second command.

16. A memory module couplable to a memory controller of a host system, the memory module comprising:

a non-volatile memory (NVM) subsystem;

a data manager coupled to a data manager controller and to the NVM subsystem;

a volatile memory (VM) subsystem coupled to the data manager; and

a controller operable to receive a read command from the memory controller of the host system, the controller is configured to determine, in response to the read command, a target address for a requested data, and if requested data is not stored in the VM subsystem, then the controller (i) initiates data transfer operations from the NVM subsystem to the VM subsystem by way of the data manager, and (ii) initiates data transfer operations from the VM subsystem to the memory controller of the host system by way of the data manager, wherein transfer of data between the memory controller of the host system and the VM subsystem is by way of a first data bus and a first protocol, and transfer of data between the NVM and the VM subsystem is by way of the first and a second protocol respectively on a second data bus and a third data bus.

17. The memory module of claim 16, wherein the controller is operable to direct (i) operation of the NVM subsystem by way of a NVM controller, (ii) operation of the VM subsystem by way of a VM controller, and (iii) operation of the data manager by way of a data manager controller to transfer data between any two or more of the memory controller of the host system, the VM subsystem, and the NVM subsystem based on the read command.

18. The memory module of claim 16, wherein the data manager controls a starting time of a data transfer between any two or more of the memory controller of the host system, the VM subsystem, and the NVM subsystem based on the read command.

19. The memory module of claim 16, wherein the VM subsystem includes first and second VM subsystems.

20. The memory module of claim 19, wherein the data manager controls a starting time of a data transfer between any one of the first VM subsystem and the second VM subsystem and any one of the NVM subsystem and the memory controller of the host system based on the read command.

21. The memory module of claim 19, wherein the data manager is operable to concurrently transfer data (i) between the first VM subsystem and the memory controller of the host system, and (ii) between the NVM subsystem and the second VM subsystem.