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System and method for deadlock-free pipelining

  • US 9,928,639 B2
  • Filed: 11/27/2013
  • Issued: 03/27/2018
  • Est. Priority Date: 04/08/2009
  • Status: Active Grant
First Claim
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1. A processor group of a graphics processing unit, said processor group comprising:

  • a register file for storing data related to a plurality of threads concurrently operable within said processor group;

    a texture unit for processing texture operations of said plurality of threads wherein each texture operation comprises a texture request operation and a corresponding texture read-back operation;

    a buffer separate from said register file and within said texture unit for receiving results of said texture operations from said texture unit and storing said results, wherein said corresponding texture read-back operation reads from said buffer; and

    a circuit for preventing deadlock within said texture unit and comprising a circuit for determining a number of texture request operations for said texture unit of a thread,wherein said number of texture request operations comprises a number of multiple texture request operations that are present within said thread before a texture read-back operation is present within said thread.

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