Vertical fuse structures
First Claim
1. A method for fabricating a semiconductor device, comprising:
- forming a plurality of vertical semiconductor fins on a semiconductor substrate, the plurality of vertical semiconductor fins comprising a first vertical semiconductor fin and a second vertical semiconductor fin;
forming a vertical fuse device having a first dummy gate structure formed over a portion of the first vertical semiconductor fin;
forming a FINFET (Fin Field Effect Transistor) device having a second dummy gate structure formed over a portion of the second vertical semiconductor fin; and
performing a RMG (replacement metal gate) process to remove the first and second dummy gate structures, and to replace the first dummy gate structure with a metal fuse element for the vertical fuse device and replace the second dummy gate structure with a metal gate electrode for the FINFET device, wherein performing the RMG process comprises;
removing the first dummy gate structure to form a first recess between insulating sidewall spacers of the vertical fuse device;
removing the second dummy gate structure to form a second recess between insulating sidewall spacers of the FINFET device;
forming a conformal gate dielectric layer on exposed surfaces of the second vertical semiconductor fin in the second recess;
forming a conformal work function metal layer on exposed surfaces of the first vertical semiconductor fin in the first recess and on the conformal gate dielectric layer formed on the exposed surfaces of the second vertical semiconductor fin in the second recess; and
depositing a layer of metallic material in the first and second recesses to form a metallic fuse electrode in contact with the conformal work function metal layer in the first recess and to form a metallic gate electrode in contact with the conformal work function metal layer in the second recess.
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Accused Products
Abstract
Semiconductor devices and methods are provided in which vertical fuse devices are integrally formed with FINFET (Fin Field Effect Transistor) devices, wherein the vertical fuse devices are formed as part of a process flow for fabricating the FINFET devices. For example, a semiconductor device comprises first and second vertical semiconductor fins, a vertical fuse device, and a FINFET device. The vertical fuse device comprises a metal fuse element formed over a portion of the first vertical semiconductor fin, and the FINFET device comprises a metal gate electrode formed over a portion of the second vertical semiconductor fin. The metal fuse element and the metal gate electrode are concurrently formed as part of a replacement metal gate process flow.
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Citations
9 Claims
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1. A method for fabricating a semiconductor device, comprising:
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forming a plurality of vertical semiconductor fins on a semiconductor substrate, the plurality of vertical semiconductor fins comprising a first vertical semiconductor fin and a second vertical semiconductor fin; forming a vertical fuse device having a first dummy gate structure formed over a portion of the first vertical semiconductor fin; forming a FINFET (Fin Field Effect Transistor) device having a second dummy gate structure formed over a portion of the second vertical semiconductor fin; and performing a RMG (replacement metal gate) process to remove the first and second dummy gate structures, and to replace the first dummy gate structure with a metal fuse element for the vertical fuse device and replace the second dummy gate structure with a metal gate electrode for the FINFET device, wherein performing the RMG process comprises; removing the first dummy gate structure to form a first recess between insulating sidewall spacers of the vertical fuse device; removing the second dummy gate structure to form a second recess between insulating sidewall spacers of the FINFET device; forming a conformal gate dielectric layer on exposed surfaces of the second vertical semiconductor fin in the second recess; forming a conformal work function metal layer on exposed surfaces of the first vertical semiconductor fin in the first recess and on the conformal gate dielectric layer formed on the exposed surfaces of the second vertical semiconductor fin in the second recess; and depositing a layer of metallic material in the first and second recesses to form a metallic fuse electrode in contact with the conformal work function metal layer in the first recess and to form a metallic gate electrode in contact with the conformal work function metal layer in the second recess. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for fabricating a semiconductor device, comprising:
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forming a plurality of vertical semiconductor fins on a semiconductor substrate, the plurality of vertical semiconductor fins comprising a first vertical semiconductor fin and a second vertical semiconductor fin; forming a vertical fuse device having a first dummy gate structure formed over a portion of the first vertical semiconductor fin; forming a FINFET (Fin Field Effect Transistor) device having a second dummy gate structure formed over a portion of the second vertical semiconductor fin; and performing a RMG (replacement metal gate) process to remove the first and second dummy gate structures, and to replace the first dummy gate structure with a metal fuse element for the vertical fuse device and replace the second dummy gate structure with a metal gate electrode for the FINFET device; wherein the first and second dummy gate structures each comprise a dummy gate oxide layer formed on the respective portions of the first and second vertical semiconductor fins, and a dummy gate polysilicon layer; wherein performing the RMG process to remove the first and second dummy gate structures comprises; etching the dummy gate polysilicon layer selective to the dummy gate oxide layer; and etching the dummy gate oxide layer selective to first and second vertical semiconductor fins.
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Specification