Display device

• US 9,929,227 B2
• Filed: 10/06/2016
• Issued: 03/27/2018
• Est. Priority Date: 06/29/2010
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Sagawa, Hiroshi
• Primary Examiner(s): HOANG, QUOC DINH
• Application Number:
  US15/287,286
• Publication Number:
  US 20170025490A1
• Time in Patent Office: 537 Days
• CPC Class Codes: H01L 23/50 for integrated circuit devices, e.g. power bus, number of leadsH01L23/482 - H01L23/498 take precedence
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H10K 50/805 Electrodes
• CPC Class Codes: H10K 50/824 combined with auxiliary electrodes
• CPC Class Codes: H10K 59/00 Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
• CPC Class Codes: H10K 59/1201 Manufacture or treatment
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements
• CPC Class Codes: H10K 59/131 Interconnections, e.g. wiring lines or terminals

Abstract

A display device includes, on a substrate, light emitting elements each formed by sequentially stacking a first electrode layer, an organic layer including a light emission layer, and a second electrode layer and arranged in first and second directions which cross each other, a drive circuit including drive elements that drive light emitting elements, and a wiring extending in the first direction, and an insulating layer disposed in a gap region sandwiched by the light emitting elements neighboring in the second direction and having a recess or a projection. The wiring is disposed in an overlap region overlapping with the recess or the projection in the insulating layer in a thickness direction, in the gap region, and the second electrode layers in the light emitting elements neighboring in the second direction are separated from each other by the recess or the projection in the insulating layer.

Claims

1. A display device comprising:

a substrate;

a planarization film;

a first light emitting element and a second light emitting element, each of the first and second light emitting elements including

a first electrode formed on the planarization film,

an organic light emission layer formed on the first electrode, and

a second electrode formed on the organic light emission layer

a scan line that propagates a scan signal, extending along a first direction and disposed on the substrate;

a signal line that propagates an image signal, extending along a second direction that is perpendicular to the first direction and disposed on the substrate;

a pixel circuit disposed on the substrate, the pixel circuit including a first transistor connected to the signal line and the scan line, and a second transistor that supplies a driving current to the first electrode, wherein the planarization film covers the scan line, the signal line and the pixel circuit;

a metal layer formed on the planarization film; and

an element isolation insulating layer formed on the planarization film and disposed between the first light emitting element and the second light emitting element;

wherein the element isolation insulating layer has a base portion having a first upper surface and a projection portion having a second upper surface that is higher than the first surface, the projection portion being made of a same material as the base portion and formed in a region between the first and the second light emitting elements in a planer view,

wherein the first and the second light emitting elements are adjacent each other along the first direction,

wherein the organic light emission layer and the second electrode of the first light emitting elements cover the first upper surface, and

wherein the metal layer is electrically connected to the second electrode of at least one of the first and the second light emitting elements, in a region other than light emitting regions of the first and the second light emitting elements.

2. The display device according to claim 1, wherein the projection portion has a sectional shape including two surfaces crossing each other at an acute angle.

3. The display device according to claim 1, wherein the projection is continuously formed as a portion of the element isolation insulating layer.

4. The display device according to claim 3, wherein the projection is made by exposing process using a halftone mask or by performing multiple exposure process.

5. The display device according to claim 1, wherein the first and the second upper surfaces are substantially parallel to a surface of the substrate on which the first and the second light emitting elements are formed.

6. The display device according to claim 1, wherein the metal layer is an auxiliary wiring for the second electrode and is disposed between the first and the second light emitting elements.

7. The display device according to claim 1, wherein the signal line extends though the region between the first and the second light emitting elements in the planer view.

8. The display device according to claim 7, wherein the pixel circuit is connected to one of the first or the second light emitting elements.

9. The display device according to claim 1, wherein the second electrode of each of the first and the second light emitting elements is formed as a common electrode layer.

10. The display device according to claim 1, wherein the common electrode layer is formed on the element isolation insulating layer.

11. The display device according to claim 10, wherein the common electrode layer has a discontinuity on the element isolation insulating layer.

12. The display device according to claim 1, wherein the element isolation insulating layer has a recess, and

a lowermost part of the recess has a third upper surface that is lower than those of the first and the second uppermost surfaces.

13. The display device according to claim 12, wherein a part of the organic light emission layer is disposed within the recess.

14. The display device according to claim 13, wherein the part of the organic light emission layer within the recess is divided from another part of the organic light emission layer.

15. The display device according to claim 1, wherein the signal lines overlaps with the projection portion in the planer view.

16. The display device according to claim 15, wherein a parasitic capacitance between the second electrode of the light emitting elements and the signal lines is reduced due to the projection portion.

17. A display device comprising:

a substrate;

a plurality of scanning lines extending along a first direction and disposed on the substrate;

a plurality of signal lines extending along a second direction that is perpendicular to the first direction and disposed on the substrate;

a plurality of pixel circuits disposed on the substrate;

a planarization film that covers the scanning lines, the signal lines and the pixel circuits;

a plurality of light emitting elements, wherein each of the light emitting elements includes;

a first electrode formed on the planarization film,

an organic light emission layer formed on the first electrode, and

a second electrode formed on the organic light emission layer, wherein light generated in the organic light emission layer is extracted through the second electrode;

a wiring formed on the planarization film, the wiring being electrically connected the second electrode of at least one of the light emitting elements in a region other than light emitting regions of the light emitting elements; and

an element isolation insulating layer formed on the planarization film,

wherein each of the pixel circuits includes;

a first transistor that samples an image signal; and

a second transistor that supplies a driving current to the first electrode of a corresponding one of the light emitting elements in response to the sampled image signal;

wherein the element isolation insulating layer includes a base portion having a first uppermost surface and a projection portion having a second uppermost surface that is higher than the first uppermost surface, the base portion and the projection portion being made of a same organic material,

the organic light emission layer of one of the first light emitting elements covers the first uppermost surface, and

the projection portion is protruding from the base portion in a thickness direction, and is located in a region between light emitting regions of two of the light emitting elements adjacent to each other along the first direction in a planar view.

18. The display device according to claim 17, wherein the second electrode of each of the light emitting elements is formed as a common layer.

19. The display device according to claim 18, wherein a first part of the common layer is disposed on the second uppermost surface.

20. The display device according to claim 19, wherein a second part of the common layer on the first uppermost surface is disposed at a first distance in the thickness direction from a surface of the substrate, and

the first part of the common layer on the second uppermost surface is at a second distance in the thickness direction from the surface of the substrate, the second distance being larger than the first distance.

21. The display device according to claim 20 wherein the element isolation insulating layer has a recess in the base portion,

a lowermost part of the recess has a third upper surface at the third distance from the surface of the substrate, and

wherein the first distance is smaller than the second distance, but is larger than the third distance.

22. The display device according to claim 21, wherein a part of the organic light emission layer and a third part of the common layer are disposed within the recess.