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Methods and systems for selection of unions of vector signaling codes for power and pin efficient chip-to-chip communication

  • US 9,929,818 B2
  • Filed: 07/07/2015
  • Issued: 03/27/2018
  • Est. Priority Date: 05/20/2010
  • Status: Active Grant
First Claim
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1. An apparatus comprising:

  • an encoder configured to map a set of information bits into a code word of a respective subcode among a plurality of subcodes that collectively comprise a vector signaling code, each subcode among the plurality of subcodes comprising multiple code words, the plurality of subcodes including a first unbalanced subcode and a second unbalanced subcode, wherein a sum of analog voltages representing the first unbalanced subcode is opposite in sign to a sum of analog voltages representing the second unbalanced subcode; and

    an output driver operative to transform the code word into physical signals on multiple transmission elements of a data bus.

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