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Deterministic built-in self-test based on compressed test patterns stored on chip and their derivatives

  • US 9,933,485 B2
  • Filed: 02/23/2016
  • Issued: 04/03/2018
  • Est. Priority Date: 02/24/2015
  • Status: Active Grant
First Claim
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1. A system, comprising:

  • a decompressor configured at least to decompress one of compressed test patterns stored on chip for a predetermined number of times; and

    a controller configured at least to output a control signal based on control data stored on chip, outputs of the decompressor being inverted at one or more scan shift clock cycles based on the control signal which enables the system to output the predetermined number of test patterns based on the one of compressed test patterns, wherein the one or more scan shift clock cycles are different for each of the predetermined number of test patterns.

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