Pixel circuits for AMOLED displays

• US 9,934,725 B2
• Filed: 06/28/2017
• Issued: 04/03/2018
• Est. Priority Date: 03/08/2013
• Status: Active Grant

• Current Assignee: IGNIS Innovation Incorporated
• Original Assignee: IGNIS Innovation Incorporated
• Inventors: Chaji, Gholamreza, Azizi, Yaser
• Primary Examiner(s): Lee, Jr., Kenneth B
• Application Number:
  US15/635,653
• Publication Number:
  US 20170301292A1
• Time in Patent Office: 279 Days
• Field of Search: None
• CPC Class Codes: G06F 1/3218 of display devices
• CPC Class Codes: G06F 1/3265 Power saving in display device
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0866 by means of changes in the pixel supply voltage
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2320/0295 by monitoring each display pixel
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2320/045 Compensation of drifts in the characteristics of light emitting or modulating elements
• CPC Class Codes: G09G 2320/048 using evaluation of the usage time
• CPC Class Codes: G09G 2320/0613 The adjustment depending on the type of the information to be displayed
• CPC Class Codes: G09G 2320/0626 for control of overall brightness
• CPC Class Codes: G09G 2320/0693 Calibration of display systems
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2330/022 in absence of operation, e.g. no data being entered during a predetermined time
• CPC Class Codes: G09G 2330/023 using energy recovery or conservation
• CPC Class Codes: G09G 2360/18 Use of a frame buffer in a display terminal, inclusive of the display panel
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A system for driving a display that includes a plurality of pixel circuits arranged in an array, each of the pixel circuits including a light emitting device and a driving transistor for conveying a driving current through the light emitting device. Methods of measuring characteristics of circuit elements of pixels sharing a monitor line include the control of biasing to selectively turn off circuit elements or render their response known while measuring other circuit elements of interest.

Claims

1. A method of determining characteristics of at least one circuit element of at least one selected pixel in an array of pixels in a display in which each pixel includes a drive transistor for supplying current to an optoelectronic device of the pixel, the method comprising:

controlling a biasing of a selected pixel of the at least one selected pixel including a biasing over a monitor line coupled to the selected pixel;

controlling a biasing of a first drive transistor of a first pixel other than the selected pixel such that a first optoelectronic device of said first pixel is biased so that the first optoelectronic device is turned off, the first pixel sharing the monitor line with the selected pixel; and

measuring at least one characteristic of the at least one circuit element of said selected pixel with use of said monitor line.

2. The method of claim 1, wherein one of a source and a drain terminal of the first drive transistor is coupled to the first optoelectronic device and the other of the source and drain terminal of the first drive transistor is coupled to a first supply voltage, and wherein the monitor line is coupled via a first source switch to a first node of the first pixel, the first node between the optoelectronic device and the one of a source and a drain terminal of the first drive transistor, wherein controlling a biasing of the first drive transistor of the first pixel comprises adjusting at least a voltage of the first supply voltage and a voltage applied to a gate terminal of the first drive transistor to ensure the first optoelectronic device is off.

3. A method of determining the characteristics of circuit elements of at least one selected pixel in an array of pixels in a display in which each pixel includes a drive transistor for supplying current to an optoelectronic device of the pixel, the method comprising:

controlling a biasing of a selected pixel of the at least one selected pixel, said biasing including a biasing over a monitor line coupled to the selected pixel;

controlling a biasing of a first pixel other than the selected pixel coupled to the monitor line via source and drain terminals of a first source switch such that the first source switch is biased with at least one of a zero voltage and a fixed known voltage across the source and the drain terminal of the first source switch resulting in a corresponding one of a zero current and a fixed known current passing through the first source switch, the first pixel sharing the monitor line with the selected pixel; and

measuring at least one characteristic of at least one circuit element of said selected pixel with use of said monitor line.

4. The method according to claim 3, wherein measuring at least one characteristic of at least one circuit element of said selected pixel comprises measuring the current of a selected optoelectronic device of the selected pixel by measuring a current over the monitor line.

5. The method according to claim 4, wherein measuring at least one characteristic of at least one circuit element of said selected pixel further comprises subtracting a value of the fixed known current from a value of the current measured over the monitor line.

6. The method according to claim 4, wherein one of a source and a drain terminal of a first drive transistor of the first pixel is coupled to a first optoelectronic device of the first pixel and the other of the source and drain terminal of the first drive transistor is coupled to a first supply voltage, and wherein one of the source and the drain terminal of the first source switch is coupled to a first node of the first pixel between the first optoelectronic device and the one of a source and a drain terminal of the first drive transistor, and the other of the source and the drain terminal of the first source switch is coupled to the monitor line, wherein controlling a biasing of the first pixel comprises biasing a gate of the first drive transistor to turn the first drive transistor on and adjusting a biasing over the monitor line to one of a voltage equal the voltage of the supply voltage and a voltage different from the voltage of the supply voltage by the fixed known voltage, and wherein biasing of the selected pixel comprises biasing a gate of the selected drive transistor to turn the selected drive transistor off.