Methods for determining the resistive states of resistive change elements

• US 9,934,848 B2
• Filed: 06/07/2016
• Issued: 04/03/2018
• Est. Priority Date: 06/07/2016
• Status: Active Grant

• Current Assignee: Nantero Incorporated
• Original Assignee: Nantero Incorporated
• Inventors: Harvard, Qawi
• Primary Examiner(s): Hoang, Huan
• Assistant Examiner(s): Techane, Muna A
• Application Number:
  US15/175,234
• Publication Number:
  US 20170352415A1
• Time in Patent Office: 665 Days
• Field of Search: 365148
• CPC Class Codes: G11C 13/0007 comprising metal oxide memory material, e.g. perovskites
• CPC Class Codes: G11C 13/0023 Address circuits or decoders
• CPC Class Codes: G11C 13/0026 Bit-line or column circuits
• CPC Class Codes: G11C 13/004 Reading or sensing circuits or methods
• CPC Class Codes: G11C 13/0069 Writing or programming circuits or methods
• CPC Class Codes: G11C 13/0097 Erasing, e.g. resetting, circuits or methods
• CPC Class Codes: G11C 2013/005 Read using potential difference applied between cell electrodes
• CPC Class Codes: G11C 2213/77 Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
• CPC Class Codes: G11C 2213/79 Array wherein the access device being a transistor
• CPC Class Codes: G11C 2213/82 Array having, for accessing a cell, a word line, a bit line and a plate or source line receiving different potentials
• CPC Class Codes: H10K 10/484 characterised by the channel regions
• CPC Class Codes: H10K 85/221 Carbon nanotubes

Abstract

Devices and methods for determining resistive states of resistive change elements in resistive change element arrays are disclosed. According to some aspects of the present disclosure the devices and methods for determining resistive states of resistive change elements can determine resistive states of resistive change elements by sensing current flow. According to some aspects of the present disclosure the devices and methods for determining resistive states of resistive change elements can determine resistive states of resistive change elements without the need for in situ selection devices or other current controlling devices. According to some aspects of the present disclosure the devices and methods for determining resistive states of resistive change elements can reduce the impact of sneak current when determining resistive states of resistive change elements.

Claims

1. A method for determining a resistive state of a resistive change element in a resistive change element array, said method comprising:

selecting a resistive change element from a plurality of resistive change elements in a resistive change element array, wherein each resistive change element is electrically connected to a bit line of a plurality of bit lines in said resistive change element array and a word line of a plurality of word lines in said resistive change element array;

setting a potential amount of current permitted to be supplied for determining a resistive state of said resistive change element;

supplying an amount of current for determining said resistive state of said resistive change element to said bit line electrically connected to said resistive change element, wherein said amount of current for determining said resistive state of said resistive change element is limited to a set amount of current, and wherein said amount of current for determining said resistive state of said resistive change element is regulated by said potential amount of current permitted to be supplied until said potential amount of current permitted to be supplied exceeds said set amount of current; and

determining said resistive state of said resistive change element based on said potential amount of current permitted to be supplied and said set amount of current.

2. The method of claim 1, wherein said resistive state of said resistive change element is determined to be a low resistive state when said potential amount of current permitted to be supplied is greater than said set amount of current.

3. The method of claim 2, wherein said low resistive state corresponds to a logic 1.

4. The method of claim 1, wherein said resistive state of said resistive change element is determined to be a high resistive state when said potential amount of current permitted to be supplied is less than said set amount of current.

5. The method of claim 4, wherein said high resistive state corresponds to a logic 0.

6. The method of claim 1, wherein said resistive change element array comprises a plurality of resistive change element cells, and wherein each resistive change element cell includes one resistive change element of said plurality of resistive change elements.

7. The method of claim 6, wherein each resistive change element cell in said plurality of resistive change element cells does not include an in situ selection device.

8. The method of claim 1, wherein each resistive change element in said plurality of resistive change elements is connected to a bit line of said plurality of bit lines and a word line of said plurality of word lines without any intervening devices.

9. The method of claim 1, wherein said set amount of current is set based on an amount of current flowing through said resistive change element when said resistive change element has a high resistive state and an amount of current flowing through said resistive change element when said resistive change element has a low resistive state.

10. The method of claim 9, wherein said set amount of current is an average of said amount of current flowing through said resistive change element when said resistive change element has said high resistive state and said amount of current flowing through said resistive change element when said resistive change element has said low resistive state.

11. A method for determining a resistive state of a resistive change element in a resistive change element array, said method comprising:

selecting a resistive change element from a plurality of resistive change elements in a resistive change element array, wherein each resistive change element is electrically connected to a bit line of a plurality of bit lines in said resistive change element array and a word line of a plurality of word lines in said resistive change element array;

setting a potential amount of current permitted to be supplied for determining a resistive state of said resistive change element;

supplying an amount of current for determining said resistive state of said resistive change element to said bit line electrically connected to said resistive change element, wherein said amount of current for determining said resistive state of said resistive change element is limited to a set amount of current, and wherein said amount of current for determining said resistive state of said resistive change element is regulated by said potential amount of current permitted to be supplied until said potential amount of current permitted to be supplied exceeds said set amount of current; and

determining said resistive state of said resistive change element based on an amount of current flowing through said resistive change element and said amount of current for determining said resistive state of said resistive change element.

12. The method of claim 11, wherein said resistive state of said resistive change element is determined to be a low resistive state when said amount of current flowing through said resistive change element is greater than said amount of current for determining said resistive state of said resistive change element.

13. The method of claim 12, wherein said low resistive state corresponds to a logic 1.

14. The method of claim 11, wherein said resistive state of said resistive change element is determined to be a high resistive state when said amount of current flowing through said resistive change element is less than or equal to said amount of current for determining said resistive state of said resistive change element.

15. The method of claim 14, wherein said high resistive state corresponds to a logic 0.

16. The method of claim 11, wherein said resistive change element array comprises a plurality of resistive change element cells, and wherein each resistive change element cell includes one resistive change element of said plurality of resistive change elements.

17. The method of claim 16, wherein each resistive change element cell in said plurality of resistive change element cells does not include an in situ selection device.

18. The method of claim 11, wherein each resistive change element in said plurality of resistive change elements is connected to a bit line of said plurality of bit lines and a word line of said plurality of word lines without any intervening devices.

19. The method of claim 11, wherein said set amount of current is set based on an amount of current flowing through said resistive change element when said resistive change element has a high resistive state and an amount of current flowing through said resistive change element when said resistive change element has a low resistive state.

20. The method of claim 19, wherein said set amount of current is an average of said amount of current flowing through said resistive change element when said resistive change element has said high resistive state and said amount of current flowing through said resistive change element when said resistive change element has said low resistive state.