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Non-volatile memory and method for programming and reading a memory array having the same

  • US 9,935,113 B2
  • Filed: 05/25/2017
  • Issued: 04/03/2018
  • Est. Priority Date: 05/25/2016
  • Status: Active Grant
First Claim
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1. A non-volatile memory, comprising:

  • a fin structure;

    a first fin field effect transistor (FinFET), formed on the fin structure and having a first gate, a first source region, and a first drain region;

    a second FinFET, formed on the fin structure and having a second gate, a second drain region, and a second source region coupled to the first drain region;

    an antifuse structure, formed on the fin structure and having a sharing gate, a single diffusion break (SDB) isolation structure, a first source/drain region, and a second source/drain region, wherein the SDB isolation structure is formed between the first source/drain region and the second source/drain region, a top surface of the SDB isolation structure is covered by the sharing gate, and the first source/drain region is coupled to the second drain region;

    a third FinFET, formed on the fin structure and having a third gate, a third source region, and a third drain region coupled to the second source/drain region; and

    a fourth FinFET, formed on the fin structure and having a fourth gate, a fourth source region, and a fourth drain region coupled to the third source region.

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