Display substrate and manufacturing method thereof, display device

• US 9,935,131 B2
• Filed: 05/06/2016
• Issued: 04/03/2018
• Est. Priority Date: 07/29/2015
• Status: Expired due to Fees

• Current Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.), BOE Technology Group Co., Ltd.
• Original Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.), BOE Technology Group Co., Ltd.
• Inventors: Lv, Zhenhua, Wang, Lei, Xue, Yanna, Bao, Zhiying
• Primary Examiner(s): Gumedzoe, Peniel M
• Application Number:
  US15/148,083
• Publication Number:
  US 20170033123A1
• Time in Patent Office: 697 Days
• CPC Class Codes: H01L 21/31111 by chemical means
• CPC Class Codes: H01L 21/76802 by forming openings in dielectrics
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H01L 29/42356 Disposition, e.g. buried gate electrode H01L29/42324 and H01L29/4234 take precedence

Abstract

The invention provides a display substrate and a manufacturing method thereof, and a display device. The display substrate comprises: a base, and gate lines and data lines, the data lines and the gate lines intersect with each other and are insulated from each other, the gate lines are electrically connected to a gate driver, the data lines are electrically connected to a source driver, the gate driver is provided at one side opposite to the source driver; gate signal lead-in lines, which are arranged parallel to the data lines; and an interlayer insulation layer provided between a layer in which the gate signal lead-in lines are arranged and a layer in which the gate lines are arranged, one end of each gate signal lead-in line is electrically connected to the gate driver, the other end thereof is connected to a gate line through a via penetrating the interlayer insulation layer.

Claims

1. A display substrate, comprising:

a base, and a plurality of gate lines and a plurality of data lines provided on the base, the plurality of data lines and the plurality of gate lines intersect with each other and are insulated from each other, the plurality of gate lines are electrically connected to a gate driver, and the plurality of data lines are electrically connected to a source driver, wherein

the gate driver is provided at one side opposite to the source driver on the display substrate; and

the display substrate further comprises a plurality of gate signal lead-in lines, which are arranged parallel to a direction in which the data lines are arranged, and an interlayer insulation layer provided between a layer in which the gate signal lead-in lines are arranged and a layer in which the gate lines are arranged, and wherein

one end of each of the gate signal lead-in lines is electrically connected to the gate driver, another end thereof is connected to a gate line through a via penetrating the interlayer insulation layer, and respective gate signal lead-in lines are connected to different gate lines,

wherein a layer in which the data lines are arranged is located below a layer in which the gate lines are arranged, and the two layers are spaced from each other by a gate insulation layer, and

the layer in which the data lines are arranged is between the layer in which the gate lines are arranged and the base.

2. The display substrate of claim 1, wherein the data lines and the gate signal lead-in lines are made of a same material.

3. The display substrate of claim 2, wherein projections of each of the gate signal lead-in lines and a data line corresponding to the gate signal lead-in line on the base completely coincide.

4. A display device comprising the display substrate of claim 1.

5. The display substrate of claim 1, wherein projections of each of the gate signal lead-in lines and a data line corresponding to the gate signal lead-in line on the base completely coincide.

6. A manufacturing method of a display substrate, comprising:

forming a plurality of gate lines and a plurality of data lines provided on a base so that the plurality of data lines and the plurality of gate lines intersect with each other and are insulated from each other, wherein the plurality of gate lines are electrically connected to a gate driver, the plurality of data lines are electrically connected to a source driver, wherein the gate driver is provided at one side opposite to the source driver on the display substrate, the manufacturing method further comprising;

forming an interlayer insulation layer above a layer in which the gate lines are arranged, and forming a plurality of vias in the interlayer insulation layer by etching;

forming a plurality of gate signal lead-in lines, which are arranged parallel to a direction in which the data lines are arranged, through a patterning process, wherein one end of each of the gate signal lead-in lines is electrically connected to the gate driver, the other end thereof is connected to a gate line through a via penetrating the interlayer insulation layer, and the respective gate signal lead-in lines are connected to different gate lines,

wherein a layer in which the data lines are arranged is located below a layer in which the gate lines are arranged, and the two layers are spaced from each other by a gate insulation layer, and

the layer in which the data lines are arranged is between the layer in which the gate lines are arranged and the base.

7. The manufacturing method of a display substrate of claim 6, further comprising:

forming a pattern of the plurality of data lines while forming the plurality of gate signal lead-in lines.

8. The manufacturing method of a display substrate of claim 7, wherein every two adjacent data lines are provided therebetween with one of the gate signal lead-in lines, and the gate signal lead-in lines are evenly spaced.

9. The manufacturing method of a display substrate of claim 6, wherein every two adjacent data lines are provided therebetween with one of the gate signal lead-in lines, and the gate signal lead-in lines are evenly spaced.

10. The manufacturing method of a display substrate of claim 6, wherein forming the plurality of gate lines and the plurality of data lines comprises:

forming a pattern including the plurality of data lines on the base through a patterning process;

forming a gate insulation layer; and

forming a pattern including the plurality of gate lines through a patterning process.

11. The manufacturing method of a display substrate of claim 6, wherein the interlayer insulation layer comprises a first insulation layer and a second insulation layer, and forming the plurality of gate lines and the plurality of data lines and forming the plurality of gate signal lead-in lines comprise:

forming a pattern including the plurality of gate lines on the base through a patterning process;

forming the first insulation layer;

forming a pattern including the plurality of data lines through a patterning process;

forming the second insulation layer, and forming vias penetrating the first insulation layer and the second insulation layer by etching; and

forming a pattern including the plurality of gate signal lead-in lines through a patterning process, wherein the gate signal lead-in lines are connected to the gate lines through the vias penetrating the interlayer insulation layer, and the respective gate signal lead-in lines are connected to different gate lines.

12. The manufacturing method of a display substrate of claim 6, wherein forming the plurality of gate lines and the plurality of data lines and forming the plurality of gate signal lead-in lines comprise:

forming a pattern including the plurality of gate lines on the base through a patterning process;

forming an interlayer insulation layer, and forming a plurality of vias in the interlayer insulation layer by etching;

forming a pattern including the plurality of gate signal lead-in lines through a patterning process, wherein the gate signal lead-in lines are connected to the gate lines through the vias penetrating the interlayer insulation layer, and the respective gate signal lead-in lines are connected to different gate lines;

forming a passivation layer;

forming a pattern including the plurality of data lines through a patterning process.

13. The manufacturing method of a display substrate of claim 6, wherein projections of each of the gate signal lead-in lines and a data line corresponding to the gate signal lead-in line on the base completely coincide.