Type IV semiconductor based high voltage laterally stacked multijunction photovoltaic cell

• US 9,935,230 B1
• Filed: 10/05/2016
• Issued: 04/03/2018
• Est. Priority Date: 10/05/2016
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Bedell, Stephen W., Li, Ning, Sadana, Devendra K., Shahidi, Ghavam G.
• Primary Examiner(s): Mekhlin, Eli
• Application Number:
  US15/285,913
• Publication Number:
  US 20180097138A1
• Time in Patent Office: 545 Days
• CPC Class Codes: H01L 31/022433 Particular geometry of the grid contacts
• CPC Class Codes: H01L 31/028 including, apart from doping material or other impurities, only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/03529 Shape of the potential jump barrier or surface barrier
• CPC Class Codes: H01L 31/0687 Multiple junction or tandem solar cells
• CPC Class Codes: H01L 31/076 Multiple junction or tandem solar cells
• CPC Class Codes: H01L 31/1804 comprising only elements of Group IV of the Periodic Table
• CPC Class Codes: Y02E 10/544 Solar cells from Group III-V materials
• CPC Class Codes: Y02E 10/547 Monocrystalline silicon PV cells
• CPC Class Codes: Y02E 10/548 Amorphous silicon PV cells
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

A method of forming a photovoltaic device that includes ion implanting a first conductivity type dopant into first regions of a semiconductor layer of an SOI substrate, wherein the first regions are separated by a first pitch; and ion implanting a second conductivity type dopant into second regions of the semiconductor layer of the SOI substrate. The second regions are separated by a second pitch. Each second conductivity type implanted region of the second regions is in direct contact with first conductivity type implanted region of the first regions to provide a plurality of p-n junctions, and adjacent p-n junctions are separated by an intrinsic portion of the semiconductor layer to provide P-I-N cells that are horizontally oriented.

Claims

1. A method of forming a photovoltaic device comprising:

providing a semiconductor on insulator (SOI) substrate;

ion implanting a first conductivity type dopant into first regions of the semiconductor layer of the SOI substrate, wherein the first regions are separated by a first pitch; and

ion implanting a second conductivity type dopant into second regions of the semiconductor layer of the SOI substrate, wherein the second regions are separated by a second pitch, wherein each second conductivity type implanted region of the second regions is paired in direct contact with first conductivity type implanted region of the first regions to provide a plurality of p-n junctions, and adjacent p-n junctions are separated by an intrinsic portion of the semiconductor layer to provide P-I-N cells that are horizontally oriented.

2. The method of claim 1, wherein the first conductivity type dopant is n-type and the second conductivity type dopant is p-type.

3. The method of claim 2, wherein the ion implanting of the n-type dopant comprises implanting to a depth so at least some of the n-type dopant extends to a buried oxide layer of the SOI substrate.

4. The method of claim 2, wherein the ion implanting of the p-type dopant comprises implanting to a depth so at least some of the p-type dopant extends to a buried oxide layer of the SOI substrate.

5. The method of claim 1, wherein the semiconductor layer on the SOI substrate comprises a type IV semiconductor.

6. The method of claim 2, further comprising forming a cathode electrode on one of the n-type implanted regions or the p-type implanted regions, and forming an anode electrode on another of the n-type implanted regions or the p-type implanted regions.

7. A method of forming a photovoltaic device comprising:

providing a semiconductor on insulator (SOI) substrate;

etching a plurality of openings through a semiconductor layer of the SOI substrate to a buried oxide layer of the SOI substrate;

forming a first conductivity type doped semiconductor material on sidewalls of the semiconductor layer exposed by the plurality of openings;

forming a second conductivity type doped semiconductor material in direct contact with sidewalls of the first conductivity type doped semiconductor material to provide p-n junctions; and

forming intrinsic semiconductor material filling a remainder of the plurality of openings, wherein adjacent p-n junctions are separated by the intrinsic semiconductor material to provide P-I-N cells that are horizontally oriented.

8. The method of claim 7, wherein the first conductivity type dopant is n-type and the second conductivity type dopant is p-type.

9. The method of claim 7, wherein the semiconductor layer on the SOI substrate comprises a type IV semiconductor.

10. The method of claim 7, wherein forming the first conductivity type doped semiconductor material comprises an epitaxial growth process including in situ doping.

11. The method of claim 7, wherein forming the second conductivity type doped semiconductor material comprises an epitaxial growth process including in situ doping.

12. The method of claim 7, wherein forming the intrinsic semiconductor material comprises epitaxial deposition without n-type or p-type dopants that create an excess of electron carriers, hole carriers, or a combination thereof.

13. The method of claim 7, further comprising a forming cathode electrode on one of the n-type implanted regions or the p-type implanted regions, and forming an anode electrode on another of the n-type implanted regions or the p-type implanted regions.