Modeling of a target volterra series using an orthogonal parallel wiener decomposition

• US 9,935,761 B2
• Filed: 04/17/2014
• Issued: 04/03/2018
• Est. Priority Date: 04/17/2013
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Azadet, Kameran
• Primary Examiner(s): Alhija, Saif
• Application Number:
  US14/255,499
• Publication Number:
  US 20140314182A1
• Time in Patent Office: 1,447 Days
• Field of Search: 703 2
• CPC Class Codes: G06F 17/15 Correlation function computation including computation of convolution operations arithmetic circuits for sum of products per se, e.g. multiply-accumulators G06F7/5443; digital filters, e.g. FIR, IIR, adaptive filters H03H17/00
• CPC Class Codes: G06F 30/00 Computer-aided design [CAD]
• CPC Class Codes: G06F 30/20 Design optimisation, verification or simulation optimisation, verification or simulation of circuit designs G06F30/30
• CPC Class Codes: G06F 9/30036 Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence
• CPC Class Codes: H04B 1/525 with means for reducing leakage of transmitter signal into the receiver
• CPC Class Codes: H04B 1/62 for providing a predistortion of the signal in the transmitter and corresponding correction in the receiver, e.g. for improving the signal/noise ratio
• CPC Class Codes: H04B 2001/0425 with linearisation using predistortion
• CPC Class Codes: H04J 11/004 using regenerative subtractive interference cancellation
• CPC Class Codes: H04L 1/0043 Realisations of complexity reduction techniques, e.g. use of look-up tables
• CPC Class Codes: H04L 25/03012 operating in the time domain H04L25/03165, H04L25/03178 take precedence
• CPC Class Codes: H04L 25/03343 Arrangements at the transmitter end
• CPC Class Codes: H04L 25/08 Modifications for reducing interference; Modifications for reducing effects due to line faults ; Receiver end arrangements for detecting or overcoming line faults
• CPC Class Codes: H04L 27/367 using predistortion
• CPC Class Codes: H04L 27/368 adaptive predistortion
• CPC Class Codes: H04L 5/1461 Suppression of signals in the return path, i.e. bidirectional control circuits

Abstract

Improved techniques are provided for modeling a target Volterra series using an orthogonal parallel Weiner decomposition. A target Volterra Series is modeled by obtaining the target Volterra Series V comprised of a plurality of terms up to degree K; providing a parallel Wiener decomposition representing the target Volterra Series V, wherein the parallel Wiener decomposition is comprised of a plurality of linear filters in series with at least one corresponding static non-linear function, wherein an input signal is applied to the plurality of linear filters and wherein outputs of the non-linear functions are linearly combined to produce an output of the parallel Wiener decomposition; computing a matrix C. for a given degree up to the degree K, wherein a given row of the matrix C corresponds to one of the linear filters and is obtained by enumerating monomial cross-products of coefficients of the corresponding linear filter for the given degree; and determining filter coefficients for at least one of the plurality of linear filters, such that the rows of the matrix C are linearly independent.

Claims

1. A method for a digital pre-distortion (DPD) circuit to generate an inverse distortion, the method comprising:

obtaining a target from an input, the target modeled as a target Volterra Series V comprising a plurality of terms up to degree K;

providing a parallel Wiener decomposition representing said target Volterra Series V, wherein said parallel Wiener decomposition comprises a plurality of linear filters in series with at least one corresponding static non-linear function, wherein the input signal is applied to said plurality of linear filters and wherein outputs of non-linear functions are linearly combined to produce an output of said parallel Wiener decomposition;

computing a matrix C for a given degree up to said degree K, wherein a given row of said matrix C corresponds to one of said linear filters and is obtained by enumerating monomial cross-products of coefficients of said corresponding linear filter for said given degree;

determining filter coefficients for at least one of said plurality of linear filters, such that the rows of said matrix C are linearly independent; and

generating the inverse distortion based on the determined filter coefficients.

2. The method of claim 1, further comprising computing a vector A comprising coefficients that perform said linear combination of said outputs of said plurality of static non-linear functions.

3. The method of claim 2, further comprising determining at least one of said static non-linear functions based on said vector A.

4. The method of claim 2, wherein said vector A is obtained by multiplying said target Volterra Series V by an inverse of said matrix C.

5. The method of claim 1, wherein one or more of said plurality of linear filters are shared by a plurality of degrees of said representation of said target Volterra Series V.

6. The method of claim 1, wherein one or more of said static non-linear functions are shared by a plurality of degrees of said representation of said target Volterra Series V.

7. The method of claim 1, wherein said determining filter coefficients for at least one of said plurality of linear filters further comprises evaluating a linear independence of said rows of said matrix C.

8. The method of claim 7, wherein said determining filter coefficients for at least one of said plurality of linear filters further comprises evaluating a condition number of said matrix C.

9. The method of claim 1, wherein at least one of said static non-linear functions is implemented using at least one look-up table.

10. The method of claim 9, wherein said at least one look-up table comprises entries obtained by evaluating a mean square error.

11. The method of claim 9, wherein said at least one look-up table comprises entries obtained using one or more of a least squares algorithm, recursive least squares (RLS) and least mean square (LMS).

12. The method of claim 9, wherein said at least one look-up table employs linear interpolation between two consecutive values of said at least one look-up table to approximate said at least one static non-linear function.

13. A digital pre-distortion (DPD) circuit configured to generate an inverse distortion, the inverse distortion modeled on a target Volterra Series comprising a plurality of terms up to degree K, the DPD circuit comprising:

a parallel Wiener decomposition circuit comprising a plurality of linear filters in series with at least one corresponding static non-linear function, wherein an input signal is applied to said plurality of linear filters; and

a linear combiner for combining an output of said static non-linear functions to produce an output of said parallel Wiener decomposition circuit, wherein filter coefficients for at least one of said plurality of linear filters corresponding to a given row of a matrix C for a given degree up to said degree K ensure that said given row of said matrix C is linearly independent, wherein said given row of said invertible matrix C is obtained by enumerating monomial cross-products of coefficients of said corresponding linear filter for said given degree,

wherein the DPD circuit is configured to generate the inverse distortion based on the combining of the output of said static non-linear functions.

14. The digital pre-distortion (DPD) circuit of claim 13, further comprising circuitry configured to compute a vector A comprising coefficients that perform said linear combination of said outputs of said plurality of static non-linear functions.

15. The digital pre-distortion (DPD) circuit of claim 14, wherein at least one of said static non-linear functions are based on said vector A.

16. The digital pre-distortion (DPD) circuit of claim 13, wherein one or more of said plurality of linear filters are shared by a plurality of degrees of said representation of said target Volterra Series V.

17. The digital pre-distortion (DPD) circuit of claim 13, wherein one or more of said static non-linear functions are shared by a plurality of degrees of said representation of said target Volterra Series V.

18. The digital pre-distortion (DPD) circuit of claim 13, wherein rows of said matrix C are linearly independent.

19. The digital pre-distortion (DPD) circuit of claim 13, wherein at least one of said static non-linear functions is implemented using at least one look-up table.

20. The digital pre-distortion (DPD) circuit of claim 19, wherein said at least one look-up table employs linear interpolation between two consecutive values of said at least one look-up table to approximate said at least one static non-linear function.