Semiconductor device having subthreshold operating circuits including a back body bias potential based on temperature range

• US 9,939,330 B2
• Filed: 04/30/2014
• Issued: 04/10/2018
• Est. Priority Date: 03/28/2014
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Darryl G. Walker
• Inventors: Walker, Darryl G.
• Primary Examiner(s): Olson, Jason C
• Application Number:
  US14/265,668
• Publication Number:
  US 20150280702A1
• Time in Patent Office: 1,441 Days
• Field of Search: 327543
• CPC Class Codes: G01K 13/00 Thermometers specially adapted for specific purposes
• CPC Class Codes: G01K 3/005 Circuits arrangements for indicating a predetermined temperature fire detection G08B17/00
• CPC Class Codes: G01K 7/00 Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat giving results other than momentary value of temperature G01K3/00 ; Power supply therefor, e.g. using thermoelectric elements
• CPC Class Codes: G01K 7/01 using semiconducting elements having PN junctions G01K7/02, G01K7/16, G01K7/30 take precedence
• CPC Class Codes: G01K 7/16 using resistive elements resistive elements per se H01C, H01L
• CPC Class Codes: G11C 11/40626 Temperature related aspects of refresh operations
• CPC Class Codes: G11C 11/407 for memory cells of the field-effect type
• CPC Class Codes: G11C 11/4074 Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
• CPC Class Codes: G11C 11/4093 Input/output [I/O] data interface arrangements, e.g. data buffers
• CPC Class Codes: G11C 11/4096 Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
• CPC Class Codes: G11C 7/00 Arrangements for writing information into, or reading information out from, a digital store G11C5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C11/4063, G11C11/413
• CPC Class Codes: G11C 7/04 with means for avoiding disturbances due to temperature effects
• CPC Class Codes: H03K 17/145 in field-effect transistor switches
• CPC Class Codes: H03K 17/223 in field-effect transistor switches
• CPC Class Codes: H03K 17/687 the devices being field-effect transistors
• CPC Class Codes: H03K 21/10 comprising logic circuits
• CPC Class Codes: H03K 3/012 Modifications of generator to improve response time or to decrease power consumption

Abstract

A semiconductor device that may include at least one temperature sensing circuit is disclosed. The temperature sensing circuits may be used to control various operating parameters to improve the operation of the semiconductor device over a wide temperature range. In this way, operating specifications of a semiconductor device at worst case temperatures may be met without compromising performance at other operating temperatures. The temperature sensing circuit may provide a plurality of temperature ranges for setting the operational parameters. Each temperature range can include a temperature range upper limit value and a temperature range lower limit value and adjacent temperature ranges may overlap. The temperature ranges may be set in accordance with a count value that can incrementally change in response to the at least one temperature sensing circuit.

Claims

1. A device that operates over a plurality of predetermined temperature ranges, comprising:

at least one subthreshold operating circuit including at least one first insulated gate field effect device (IGFET) having a first conductivity type;

wherein the at least one first IGFET having the first conductivity type is coupled to receive a first back body bias potential that changes according to the temperature range in which the device is operating;

wherein

the at least one subthreshold operating circuit operates at a power supply potential below threshold voltages of transistors included in the at least one subthreshold operating circuit.

2. The device of claim 1, further including:

a first back bias voltage generating circuit coupled to receive at least one of a plurality of performance parameters and provide the first back body bias potential.

3. The device of claim 2, wherein:

the at least one subthreshold operating circuit further includes at least one second IGFET having a second conductivity type; and

the at least one second IGFET having the second conductivity type is coupled to receive a second back body bias potential that changes according to the temperature range in which the device is operating.

4. The device of claim 3, further including:

a second back bias voltage generating circuit coupled to receive at least one of the plurality of performance parameters and provide the second back body bias potential.

5. The device of claim 4, wherein:

the at least one subthreshold operating circuit is coupled to receive a first power supply potential that changes according to the temperature range in which the device is operating.

6. The device of claim 5, further including:

a first power supply generating circuit coupled to receive at least one of the plurality of performance parameters and provide the first power supply potential.

7. The device, of claim 1, further including:

at least one above subthreshold operating circuit including at least one third IGFET having the first conductivity type;

wherein the at least one third IGFET having the first conductivity type is coupled to receive a third back body bias potential that changes according to the temperature range in which the device is operating;

wherein

the at least one above subthreshold operating circuit operates at a power supply potential above threshold voltages of transistors included in the at least one above subthreshold operating circuit.

8. The device of claim 7, wherein:

a third back bias voltage generating circuit coupled to receive at least one of the plurality of performance parameters and provide the third back body bias potential.

9. The device of claim 8, further including:

the at least one above subthreshold operating circuit including at least one fourth IGFET having the second conductivity type;

wherein the at least one fourth IGFET having the second conductivity type is coupled to receive a fourth back body bias potential that changes according to the temperature range in which the device is operating.

10. The device of claim 9, further including:

a fourth back bias voltage generating circuit coupled to receive at least one of the plurality of performance parameters and provide the fourth back body bias potential.

11. The device of claim 10, further including:

the at least one above subthreshold operating circuit is coupled to receive a second power supply potential that changes according to the temperature range in which the device is operating.

12. The device, of claim 11, further including:

a second power supply generating circuit coupled to receive at least one of the plurality of performance parameters and provide the second power supply potential.

13. The device of claim 1, wherein the device is a semiconductor device.

14. A device, comprising:

at least one subthreshold operating circuit including at least one first insulated gate field effect device (IGFET) having a first conductivity type wherein

the at least one first IGFET is coupled to receive a first back body bias potential having a first potential when the device is operating within a first temperature range and a second potential when the device is operating within a second temperature range;

wherein

the at least one subthreshold operating circuit operates at a power supply potential below threshold voltages of transistors included in the at least one subthreshold operating circuit.

15. The device of claim 14, further including:

a first back bias voltage generating circuit coupled to receive at least one of a plurality of performance parameters and provide the first back body bias potential.

16. The device of claim 14, wherein:

the at least one subthreshold operating circuit further includes at least one second IGFET having a second conductivity type; and

the at least one second IGFET having the second conductivity type is coupled to receive a second back body bias potential having a third potential when the device is operating within the first temperature range and a fourth potential when the device is operating within the second temperature range.

17. The device of claim 14, further including:

a temperature circuit coupled to receive a value that sets the first temperature range and the second temperature range.

18. The device of claim 17, further including:

the value is a count value; and

a counter circuit coupled to provide the count value.

19. The device of claim 18, further including:

a performance parameter table coupled to receive the count value and provide a plurality of performance parameters; and

a first back bias voltage generating circuit coupled to receive at least one of the plurality of performance parameters and provide the first back body bias potential.

20. The device of claim 14, wherein:

the device is a semiconductor device.